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Data Examination and Checking Programs--Requirements B. Carlson

This document outlines the requirements and procedures for data examination and checking programs for the EVLA Correlator. It covers hardware validation, verification, and in-system checkout/operational verification.

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Data Examination and Checking Programs--Requirements B. Carlson

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  1. Data Examination and Checking Programs--RequirementsB. Carlson EVLA Correlator F2F Meeting Dec. 11-12, 2007

  2. Outline • Overview of data products. • H/W validation. • H/W verification. • In-system checkout/operational verification. EVLA Correlator F2F Meeting - Data Check Progs.

  3. Overview of Data Products • Station Board: • Wideband state counts, autocorr coeffs. • Sub-band filters: • clip counts • pre-requantizer power measurements • re-quantizer state counts/power measure • re-quantizer clip counter • tone extractor coeffs • RFI blanker • Radar mode data capture. • Comm path/H/W error detectors. EVLA Correlator F2F Meeting - Data Check Progs.

  4. Overview of Data Products • Baseline Board: • Correlation coefficients (lags) to CBE. • Phased output (to VLBI recorders) • Data quality measurements along the phasing signal path. • Comm path/H/W error detectors. EVLA Correlator F2F Meeting - Data Check Progs.

  5. H/W Validation • Occurs during prototype test/debug phase. • Stimulate H/W with testvectors. • Ensures that design/DSP is sound, producing correct data. • Need visualization/analysis/comparison tools. • Ideally compare with “known” results. • In some cases, may not know “exact” results…need to do statistical/first principle analysis. EVLA Correlator F2F Meeting - Data Check Progs.

  6. H/W Validation • Visualization/checking tools. • RTDD (Real Time Data Display) • Ready for Station Board. • Some work required to look at Baseline Board output. • “lagfan” and “lagcomp” C programs for corr chip testing are useful and reasonably powerful for now. • What about phased output? • Need to handle/display data products as defined in RXP RFS. • Also need to have packet capture/compare capability…part of intelligent diff? RTDD? • And, of course, image processing S/W for PTC tests. EVLA Correlator F2F Meeting - Data Check Progs.

  7. H/W Verification • Once H/W is validated, build final test bed configurations, and develop a test suite for each one. • With the X-bar Board in “testmode”, can build a separate and independent test bed for each board type. E.g. Baseline Boards can be verified independent of Station Boards and vice-versa. • Each test within a test suite is one configuration, run for a set period of time, with a repeatable set of output data products. • Number of tests in suite, duration of each test, configuration for each test not pre-defined…need to use experience, to get maximum coverage for reasonable execution time. EVLA Correlator F2F Meeting - Data Check Progs.

  8. H/W Verification • A test suite produces a number of output files. • Each board is run thru the same test suite, and run “intelligent diff” to compare data products with existing “golden files” for pass/fail indication. • This is the primary (but not only) purpose of the Test Executor/intelligent diff. EVLA Correlator F2F Meeting - Data Check Progs.

  9. In-System Checkout/Verification • Once partial or full installation at site, need to develop test suite/methods to initially and then periodically check hardware. • Most hardware has built-in on-line and off-line connectivity checking that is built into normal hardware/software processing. • But still need to check data products for on-chip failures. • Likely board-to-board comparison is easiest way. • And/Or can generate test vectors at various points and compare with golden files as well. • Needs further definition of exactly what to do. EVLA Correlator F2F Meeting - Data Check Progs.

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