ECAL/HCAL Frond-End Board:tests at production site. Production flow. Aging. Flying probes. Boundary scan. PRR – March 31st 2006
All the PCBs and components are checked upon reception at the factory. SMC components are mounted first. Right after the SMC oven, there is a visual control of each side of the board plus a BGA Xray test for one out of 10 boards. The press-fit connectors are mounted with a dedicated tool. The other components are finally mounted and soldered on the wave. The analog input connectors have to be resoldered manually. There is a final visual control before powering the boards and checking the power consumption. If this is OK, the boards are sent to the aging oven. The power consumptions are tested again at the exit of the oven to look for potential component failure. Then the boards undergo the flying probe test … … followed by the Boundary Scan test. If everything is OK, the boards are sent to LAL. All the former step results are noticed in a report file. The production boards will be produced by lots of 32 boards every week. Production flow
Aging • Manufacturer will perform an aging of groups of 16 powered boards in the same crate. • Goals : • Detection of bad soldered components. • Infant mortality. • First trial with 8 boards showed no disastrous effect: all boards were functional before and after the aging. • Power consumption is controlled before and after the aging. Power supplies
Aging oven Air fan Temp probe on the central ADC
Temperature cycles • 8 cycles of 9 hours between 0 and 60 degrees. • The upper temperature was fixed after measurements made on the central ADC (the hottest component on the board): its package was at 90 degrees when air was at 60. • The goal is not to pass over 150 degrees on the ADC die.
Flying probes • Automatic test with a ‘ Takaya ‘ robot : • Measures the impedance values of nets and components and checks the interconnections. • Can diagnose a bad soldered BGA thanks to the ‘open checker’ tool. • Footprints for probes have been implemented under the BGAs.
Access to vias below the BGAs The varnish has been removed from all the vias not connected locally to another component.
The flying probes Flying needles Open checker: Hall effect probe
The FEB on the Takaya One test on each side
Boundary scan. • Partial Boundary Scan Test: • Ability to drive 2 ACTEL chains independently. • GluePGA and SeqPGA have to be programmed first (takes 10 min). • Test of Actels’ interconnections => all BGAs.
Test setup APA chain input: prog + scan AX chain Input: scan + explorer
Top view Test backplane Neighbour check from FEPGA on backplane Boundary Scan controller
Codes défauts utilisés dans les relevés de défauts A : Article (composant). ANC - Non conforme vis à vis de la nomenclature. Le composant ne correspond pas à l'article prévu à cet emplacement,(désignation, valeur, tolérance, fabricant, boîtier) Pour 2 composants mis l’un à la place de l’autre noter 2 articles ANC. Un composant en trop à un emplacement normalement vide est aussi ANC. Pour une reprise de réglage utiliser le défaut ANC en indiquant "Réglage" à la place du repère de composant. Pour une carte non vernie noter ANC avec comme repère le nom de la carte. AHS - Hors service (Tout composants défectueux ). - résistance ou autre composant coupée électriquement - CI non fonctionnel AMI - Mal implanté (surélevé, mal plaqué, de travers, patte pliée, mal cambré,...) AMT - Manquant (Manquant pour un emplacement donné) Le composant AMT peut-être un chevron de soudure, une modif filaire,…) AIN - Inversé ( polarité: diode, condo polarisé,... sens: circuit intégré, connecteur,..). ADF - Détérioré en fabrication (mauvaise manip, salissure, brûlure, déformation) Utiliser ce code lors de défaut sur le cuivre occasionné par la fab ou l’opérateur. AHT - Composant hors tolérance B Brasage (soudure au fer ou en machine :vague, four,...) BPS - Pont de soudure coté surfusion BPV - Pont de soudure coté vague BNS - Non soudé ou manque de soudure coté surfusion BNV - Non soudé ou manque de soudure coté vague BNC - Non soudé ou manque de soudure dû à la colle Z CI, carte, support ZCP - coupure de piste du au fabricant du cuivre. ZCC - court circuit du au fabricant du cuivre. RAS Rien à signaler (Le défaut trouvé par le testeur n'aboutit pas à une intervention sur la carte) - Problème dû au moyen de test, - Article changé par erreur. - Dépassement de la tolérance jugé acceptable par le réparateur. Coding of the defaults.
When the first series of 24 PCBs was launched for the preseries of 16 boards, only 7 passed the checking procedure. The problem was the width of some conductors which shrinked below 70µm (which is the absolute limit). So only 7 boards could be mounted, and the 9 remaining PCBs had to be reproduced. Then the 2 APAs were mounted in place of each other except on the first board (shared responsibility) => we ended up with only ONE good board => Jacques almost got depressed ... => BUT this was a good practice for replacing BGAs ! Unsoldering and resoldering a BGA isn’t an easy job ! One prototype board was damaged during such an operation. There were shorts after the operation in a few early cases. New specific tools were developped for the ZEVAC machine. Seems operational now … Shortcut below one of the press-fit HM connector shields and one line => solved by inserting a little piece of capton below the shield to isolate. Main problems encountered
The production chain is now perfectly defined and operational. Our experience with the factory has now become long and is very effective and satisfactory. All the boards will undergo: A 72-hour aging A flying probe test A partial boundary scan test. All test softwares were developped by the factory. The failure coverage is at the level of ??% ... Up to now, no board declared « OK » by the factory test was found bad at LAL, except for certain component failures which they cannot detect without a functional test (2 occurrences). we’re confident for the production overall quality. We’re in the starting blocks !!! Summary