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COA Memory OrganizationUnit 4b

Memory Organization in detail

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COA Memory OrganizationUnit 4b

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  1. Computer Organization & ArchitectureUnit: IVName of the faculty: Sheikh Riyazulhaq Assistant Professor Department of Computer Science & Engineering Sheikh Riyaz COA UNIT-1

  2. 1. Introduction • Memory is one of the most important functional units of a computer It is used to store both instructions and data(in sequence of 0’s and 1’s). • Every memory location has a unique address. • Memory is byte addressable, that is, every byte i.e. a group of 8 bits, has a unique address. • Some memory systems are word addressable i.e, each location consists of multiple bytes depending on the word size. • If one word is 4 bytes or 32 bits, then the memory location will be changed as 0, 4, 8, and so on. Sheikh Riyaz COA UNIT-1

  3. MAR contains the address of an instruction or data that is to be read from the memory, or the address of data that is to be written into the memory and that particular data which is to be read comes through the data bus. • Data bus is bidirectional. Sheikh Riyaz COA UNIT-1

  4. If we have a n-bit address bus then, the memory addressable memory location will be 2^n. • If you have a 3-bit address bus then the total number of location will be 2^3=8. 8 locations starting from 000, 001, we go on to 111. • So n-bit address bus can have a maximum of 2^n addressable memory locations. • And we can have a m-bit data bus. So, in that particular address the data that is present is m-bit, and m-bit data at a time can be transferred to memory. Sheikh Riyaz COA UNIT-1

  5. Memory Hierarchy • Memory hierarchy system consists of all storage devices employed in a computer system from the slow but high capacity auxiliary memory to a relatively faster main memory, to an even smaller and faster cache memory accessible to the high speed processing logic. • Main Memory: memory unit that communicates directly with the CPU (RAM) • Auxiliary Memory: device that provide backup storage (Disk Drives) • Cache Memory: special very-high-speed memory to increase the processing speed (Cache RAM) Sheikh Riyaz COA UNIT-1

  6. Figure illustrates the components in a typical memory hierarchy. • At the bottom of the hierarchy are the relatively slow magnetic tapes used to store removable files. • Next are the Magnetic disks used as backup storage. • The main memory occupies a central position by being able to communicate directly with CPU and with auxiliary memory devices through an I/O process. • Program not currently needed in main memory are transferred into auxiliary memory to provide space for currently used programs and data. Sheikh Riyaz COA UNIT-1

  7. The cache memory is used for storing segments of programs currently being executed in the CPU. • The I/O processor manages data transfer between auxiliary memory and main memory. • The auxiliary memory has a large storage capacity is relatively inexpensive, but has low access speed compared to main memory. • The cache memory is very small, relatively expensive, and has very high access speed. • The CPU has direct access to both cache and main memory but not to auxiliary memory. Sheikh Riyaz COA UNIT-1

  8. Hierarchy Sheikh Riyaz COA UNIT-1

  9. 2. Static and Dynamic RAM chips • Main memory is the central storage unit in a computer system. It is a relatively large and fast memory used to store programs and data during the computer operation. • The principal technology used for the main memory is based on semi conductor integrated circuits. • Integrated circuits RAM chips are available in two possible operating modes, static and dynamic. • Static RAM – Consists of internal flip flops that store the binary information. • Dynamic RAM – Stores the binary information in the form of electric charges that are applied to capacitors. Sheikh Riyaz COA UNIT-1

  10. Integrated circuit Random Access Memory (RAM) chips are available in two possible operating modes. They are: 1. Static: It basically consists of internal flip-flops, which store the binary information. The stored information remains valid as long as power is supplied to the unit. The static RAM is simple to use and has shorter read and write cycles. Sheikh Riyaz COA UNIT-1

  11. 2. Dynamic: It stores the binary information in the form of electric charges that are applied to capacitors. The charges are made available inside the chip by Metal Oxide Semiconductor (MOS) transistors. The stored charge on the capacitors tends to discharge with time and thus, the capacitors must be regularly recharged by refreshing the dynamic memory. • Refreshing is done by progressively supplying the capacitor with words every few milliseconds to restore the decaying charge. • The dynamic RAM uses minimum power and provides ample storage capacity in a single memory chip. Sheikh Riyaz COA UNIT-1

  12. 2. Dynamic: It stores the binary information in the form of electric charges that are applied to capacitors. The capacitors are made available inside the chip by Metal Oxide Semiconductor (MOS) transistors. The stored charge on the capacitors tends to discharge with time and thus, the capacitors must be regularly recharged by refreshing the dynamic memory. • Refreshing is done by progressively supplying the capacitor with words every few milliseconds to restore the decaying charge. • The dynamic RAM uses minimum power and provides ample storage capacity in a single memory chip. Sheikh Riyaz COA UNIT-1

  13. 2. Dynamic: Sheikh Riyaz COA UNIT-1

  14. Static vs Dynamic RAM • SRAM • RAMs that are made up of circuits and can preserve the information as long as power is supplied are referred to as Static Random Access Memories (SRAM). Flip-flops form the basic memory elements in a SRAM device. • A SRAM consists of an array of flip-flops, one for each bit. • Since SRAM consists of an array of flip-flops, a large number of flip-flops are needed to provide higher capacity memory. • Because of this, simpler flip-flop circuits, BJT and MOS transistors are used for SRAM. • This helps to save chip area and provides memory integrated circuits at relatively reduced cost, increased speed and reduces the power dissipation as well. • SRAMs have very short access times typically less than 10 ns. SRAMs with battery backup are commonly used to provide stability to data during power loss. Sheikh Riyaz COA UNIT-1

  15. Static vs Dynamic RAM • DRAM • SRAMs are faster but their cost is high, because their cells require many transistors. • RAMs can be obtained at a lower cost if simpler cells are used. A MOS storage cell based on capacitors can be used to replace the SRAM cells. Such a storage cell cannot preserve the charge (that is, data) indefinitely and must be recharged periodically. • Therefore, these cells are called as dynamic storage cells. RAMs using these cells are referred to as Dynamic RAMs or simply DRAMs. Sheikh Riyaz COA UNIT-1

  16. Sheikh Riyaz COA UNIT-1

  17. Sheikh Riyaz COA UNIT-1

  18. 3. Main Memory • Most of the main memory in a general purpose computer is made up of RAM integrated circuit chips, but a portion of the memory may be constructed with ROM chips. • Read Only Memory –Store programs that are permanently resident in the computer and for tables of constants that do not change in value once the production of the computer is completed. • The ROM portion of main memory is needed for storing an initial program called a Bootstrap loader. • Boot strap loader –function is start the computer software operating when power is turned on. • Boot strap program loads a portion of operating system from disc to main memory and control is then transferred to operating system. Sheikh Riyaz COA UNIT-1

  19. 3.1 RAM Chip • The block diagram of a RAM Chip is shown in Fig. below. • The capacity of memory is 128 words of eight bits (one byte) per word. • This requires a 7-bit address and an 8-bit bidirectional data bus. The read and write inputs specify the memory operation and the two chips select (CS) control inputs are enabling the chip only when it is selected by the microprocessor. The read and write inputs are sometimes combined into one line labelled R/W. Sheikh Riyaz COA UNIT-1

  20. The function table listed in Fig. specifies the operation of the RAM chip. • The unit is in operation only when CS1=1 and CS2=0.The bar on top of the second select variable indicates that this input is enabled when it is equal to 0. If the chip select inputs are not enabled, or if they are enabled but the read or write inputs are not enabled, the memory is inhibited and its data bus is in a high-impedance state. Sheikh Riyaz COA UNIT-1

  21. When CS1=1 and CS2=0, the memory can be placed in a write or read mode. • When the WR input is enabled, the memory stores a byte from the data bus into a location specified by the address input lines. • When the RD input is enabled, the content of the selected byte is placed into the data bus. • The RD and WR signals control the memory operation as well as the bus buffers associated with the bidirectional data bus. Sheikh Riyaz COA UNIT-1

  22. 3.2 ROM Chip A ROM chip is organized externally in a similar manner. However, since a ROM can only read, the data bus can only be in an output mode. The block diagram of a ROM chip is shown in fig. The nine address lines in the ROM chip specify any one of the 512 bytes stored in it. The two chip select inputs must be CS1=1 and CS2=0 for the unit to operate. Otherwise, the data bus is in a high-impedance state. Sheikh Riyaz COA UNIT-1

  23. 3.3 Memory Address Map • The interconnection between memory and processor is then established from knowledge of the size of memory needed and the type of RAM and ROM chips available. • The addressing of memory can be established by means of a table that specify the memory address assigned to each chip. • The table called Memory address map, is a pictorial representation of assigned address space for each chip in the system. Sheikh Riyaz COA UNIT-1

  24. The memory address map for this configuration is shown in table . The component column specifies whether a RAM or a ROM chip is used. • The hexadecimal address column assigns a range of hexadecimal equivalent addresses for each chip. • The address bus lines are listed in the third column. • The RAM chips have 128 bytes and need seven address lines. The ROM chip has 512 bytes and needs 9 address lines. Sheikh Riyaz COA UNIT-1

  25. 3.3 Memory Connection to CPU • RAM and ROM chips are connected to a CPU through the data and address buses. • The low order lines in the address bus select the byte within the chips and other lines in the address bus select a particular chip through its chip select inputs. Sheikh Riyaz COA UNIT-1

  26. The connection of memory chips to the CPU is shown in Fig. • This configuration gives a memory capacity of 512 bytes of RAM and 512 bytes of ROM. Each RAM receives the seven low-order bits of the address bus to select one of 128 possible bytes. • The particular RAM chip selected is determined from lines 8 and 9 in the address bus. This is done through a 2 X 4 decoder whose outputs go to the CS1 inputs in each RAM chip. • Thus, when address lines 8 and 9 are equal to 00, the first RAM chip is selected. When 01, the second RAM chip is select, and so on. The RD and WR outputs from the microprocessor are applied to the inputs of each RAM chip. • The selection between RAM and ROM is achieved through bus line 10. The RAMs are selected when the bit in this line is 0, and the ROM when the bit is 1. • Address bus lines 1 to 9 are applied to the input address of ROM without going through the decoder. The data bus of the ROM has only an output capability, whereas the data bus connected to the • RAMs can transfer information in both directions. Sheikh Riyaz COA UNIT-1

  27. CPU and Memory Sheikh Riyaz COA UNIT-1

  28. 4 Auxiliary Memory Auxiliary memory is the lowest-cost, highest-space, and slowest approach to storage in computer systems. Data, programs, and information are preserved for long-term storage or not in direct use. The most usual auxiliary memory devices used in computer systems are magnetic disks and magnetic tapes. Sheikh Riyaz COA UNIT-1

  29. 4 Auxiliary Memory Auxiliary memory is the lowest-cost, highest-space, and slowest approach to storage in computer systems. Data, programs, and information are preserved for long-term storage or not in direct use. The most usual auxiliary memory devices used in computer systems are magnetic disks and magnetic tapes. Sheikh Riyaz COA UNIT-1

  30. The access time consists of a seek time required to position the read-write head and a transfer time required to transfer data to and from the device. Since the seek time is usually much longer than the transfer time, we organize auxiliary storage in records or blocks. • A record or block is a specified number of characters or words. The reading or writing is always done on the entire record. • The transfer rate is the number of characters or terms that the device can transfer per second after being positioned at the beginning of the record. •  Bits are recorded as magnetic spots on the surface as it passes a stationary mechanism called a write head. Sheikh Riyaz COA UNIT-1

  31. 4.1 Magnetic Disk A magnetic disk is a round plate forged of metal or plastic coated with magnetized material. We use both sides of the disk and stack multiple disks on one spindle with read/write heads available on each surface. Sheikh Riyaz COA UNIT-1

  32. A track near the circumference is longer than a track near the disk's center. If we record bits with equal density, some tracks will contain more recorded bits than others. • Disks use variable recording density with higher density on tracks near the center than on the circumference to make all the records in a sector of equal length. It equalizes the number of bits on all the tracks of a given sector. Sheikh Riyaz COA UNIT-1

  33. 4.2 Magnetic Tape Magnetic tape is a data storage medium that uses a magnetizable coating on a long, narrow strip of plastic film or metal foil. It is one of the oldest and most traditional forms of data storage, dating back to the early days of computing. Magnetic tape is primarily used for backup and archival purposes, especially when large amounts of data need to be stored in a cost-effective manner. Sheikh Riyaz COA UNIT-1

  34. 4.3 Flash Memory • Flash memory is a non-volatile memory used to store and transfer data between a personal computer (PC) and digital devices. We can electronically reprogram and erase it. We can often see it in USB flash drives, MP3 players, digital cameras, and solid-state drives. • Flash memory is an electronically programmable, erasable, and read-only memory (EEPROM), but it can also act as standalone storage devices such as USB drives. Sheikh Riyaz COA UNIT-1

  35. 4.4 Optical Disk An optical disk is any computer disk that uses optical storage techniques and technology to read and write data. It is a storage device using optical (light) energy. It is a computer storage disk that stores data digitally and uses laser beams to read and write data. It uses optical technology in which laser light is central to the spinning disks. Sheikh Riyaz COA UNIT-1

  36. 5 Associative Memory • The time required to find an item stored in memory can be reduced considerably if stored data can be identified for access by the content of the data itself rather than by an address. • Associative Memory / Content Addressable Memory (CAM) is accessed simultaneously and in parallel on the basis of data content rather than by specific address or location Sheikh Riyaz COA UNIT-1

  37. • Associative memory is more expensive than a RAM because each cell must have storage capability as well as logic circuits • Argument register –holds an external argument for content matching • Key register –mask for choosing a particular field or key in the argument word Sheikh Riyaz COA UNIT-1

  38. The argument register A and key register K each have n bits, one for each bit of a word. • The match register M has m bits, one for each memory word • A bit Aj in the argument register is compared with all the bits in column j of the array provided that kj =1.This is done for all columns j=1,2,….n Sheikh Riyaz COA UNIT-1

  39. If a match occurs between all the unmasked bits of the argument and the bits in word i, the corresponding bit Mi in the match register is set to 1. • If one or more unmasked bits of the argument and the word do not match, Mi is cleared to 0. Sheikh Riyaz COA UNIT-1

  40. Single cell of storage • It consists of flip-flop storage element Fij and the circuits for reading, writing, and matching the cell. • The input bit is transferred into the storage cell during a write operation. The bit stored is read out during a read operation. • The match logic compares the content of the storage cell with corresponding unmasked bit of the argument and provides an output for the decision logic that sets the bit in Mi. Sheikh Riyaz COA UNIT-1

  41. Word i is equal to the argument in A if Aj=F ijfor j=1,2,…..,n. • Two bits are equal if they are both 1 or both 0. The equality of two bits can be expressed logically by the Boolean function xj=AjFij + Aj ‘Fij‘ Sheikh Riyaz COA UNIT-1

  42. where xj = 1 if the pair of bits in position j are equal;otherwise , xj =0. • For a word i is equal to the argument in A we must have all xj variables equal to 1. This is the condition for setting the corresponding match bit Mi to 1. The Boolean function for this condition is Mi = x1 x2 x3…… xn Sheikh Riyaz COA UNIT-1

  43. Read Operation • If more than one word in memory matches the unmasked argument field , all the matched words will have 1’s in the corresponding bit position of the match register • In read operation all matched words are read in sequence by applying a read signal to each word line whose corresponding Mi bit is a logic 1 • In applications where no two identical items are stored in the memory , only one word may match, in which case we can use Mi output directly as a read signal for the corresponding word Sheikh Riyaz COA UNIT-1

  44. Write Operation Can take two different forms 1. Entire memory may be loaded with new information or 2.Unwanted words to be deleted and new words to be inserted Tag register is used which has as many bits as there are words in memory • For every active ( valid ) word in memory , the corresponding bit in tag register is set to 1 • When word is deleted the corresponding tag bit is reset to 0 • The word is stored in the memory by scanning the tag register until the first 0 bit is encountered After storing the word the bit is set to 1. Sheikh Riyaz COA UNIT-1

  45. 6 Cache Memory 6.1 Introduction • The memory system is organized in several levels. By hierarchy we mean it is divided into many levels using progressively faster technologies as we move towards the processor. • Thus there are different levels of memory, and the level that is closest to the processor is faster, and which are little further from the processor are slower. • When a program residing on hard disk is to be executed , it is required to be brought into the processor. Sheikh Riyaz COA UNIT-1

  46. When a program residing on hard disk is to be executed , it is required to be brought into the processor. • From Hard Disk a portion (which is required currently) is selected and brought into the RAM. • From the RAM a portion which is required most is brought in to the Cache. • From the Cache a portion which is required currently for execution is brought in to the registers of Processor. Sheikh Riyaz COA UNIT-1

  47. Processor Memory (register) is very limited in size, so at a particular instant a small portion of program which is currently executing is present in processor registers, when that portion is finished other portion is brought in from the cache. • When a program is executed not all of it is required at particular instant, only a portion of it is present in processor registers, a larger portion of it is in cache and a larger portion of it is in RAM as compared to cache and a larger portion of it is in Hard Disk. • Faster memories contain a subset of data stored in memory below it. We proceed in steps towards the processor. Sheikh Riyaz COA UNIT-1

  48. When a program is executed not all of it is required at particular instant, only a portion of it is present in processor registers, a larger portion of it is in cache and a larger portion of it is in RAM as compared to cache and a larger portion of it is in Hard Disk. • Faster memories contain a subset of data stored in memory below it. We proceed in steps towards the processor. Sheikh Riyaz COA UNIT-1

  49. 6.2 Principle of Locality of Reference • Effectiveness of cache mechanism is based on a property of computer programs called “locality of reference” • Analysis of programs shows that most of their execution time is spent on routines in which instructions are executed repeatedly These instructions may be – loops, nested loops , or few procedures that call each other. • Many instructions in localized areas of program are executed repeatedly during some time period and reminder of the program is accessed infrequently This property is called “Locality of Reference”. Sheikh Riyaz COA UNIT-1

  50. There is a property that programs tend to reuse data and instruction they have used recently; that means, an instruction that is used at time “t” it is much likely that it will be used again at some point of time very soon. • This is called locality of reference; the rule of thumb says that 90% of the total execution time of the program is spend in only 10% of the code. This is called 90/10 rule. Sheikh Riyaz COA UNIT-1

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