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ECE 553: TESTING AND TESTABLE DESIGN OF DIGITAL SYSTES

ECE 553: TESTING AND TESTABLE DESIGN OF DIGITAL SYSTES. Combinational ATPG. Overview Major ATPG algorithms. Definitions D-Algorithm (Roth) -- 1966 D-cubes Bridging faults Logic gate function change faults PODEM (Goel) -- 1981 X-Path-Check Backtracing Summary. Forward Implication.

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729 views • 71 slides

Combinational Redundancy Identification

Combinational Redundancy Identification. Student: Yi-Yuan Huang Advisor: Chun-Yao Wang. Outline. Introduction Problem Formulation Initial Method Dilemma How To Solve Previous work Terminology Advanced Techniques Check up criterion Quit line. Outline. Flow Conclusion

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377 views • 29 slides

Sequential Testing

Sequential Testing. Two choices Make all flip-flops observable by putting them into a scan chain and using scan latches Becomes combinational testing problem Scan FF LSSD Scan hold Leave some FF unobservable - Partial scan General - Seq. testing is still very hard problem

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350 views • 23 slides

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Fault effect - PowerPoint PPT Presentation

ECE 553: TESTING AND TESTABLE DESIGN OF DIGITAL SYSTES

Combinational Redundancy Identification

Sequential Testing