Digital cfeb - PowerPoint PPT Presentation

CSC Phase I Upgrade Electronics

CSC Phase I Upgrade Electronics. ME4/2 upgrade: 72 new large chambers for high-luminosity triggering in h 1.1-1.8 Flash ADC board for cathode digitization ME1/1 to handle high rates ME1/1 to restore trigger and improve reconstruction for h 2.1-2.4

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209 views • 12 slides

Digital CFEB (an Update)

Digital CFEB (an Update). Ben Bylsma The Ohio State University. SLHC Phase 1 Upgrade. Fully Instrument ME4/2 Chambers. August 2009 Install/Instrument ME4/2 Test Chambers. OSU Digital CFEB. Replace SCA with Flash ADCs/Memories Better rate capability Similar Cost.

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209 views • 11 slides

Jianhui Gu The Ohio State University

A Digital CFEB for CSC upgrade. Jianhui Gu The Ohio State University. Current CFEB design. Production version: Nov. 2001 Functional diagram:. OUT1. 12+1bit. 40MHz. 280 Mbps. DMB. SCH1-16. CH1-16 Layer 1. 6.7 MHz. ADC. SCA. 12+1bit. 21:3 CL. TCH1-16. 6: 1mux. BUCKEYE.

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243 views • 9 slides

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