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Shift Registers and Shift Register Counters

Shift Registers and Shift Register Counters. Week 10 and Week 11 (Lecture 2 of 2). 1 0 0 0. Parallel load a 1000:. Serial receiving device. Q. Q. Q. Q. 0. D. D. D. D. X. X. X. X. 1. 0. 0. 0. 1. C p. C p. C p. C p. CLOCK INPUT. CLOCK. X=Undetermined State.

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1.75k views • 33 slides

Shift Registers

Shift Registers. Dr. Rebhi S. Baraka rbaraka@iugaza.edu Logic Design (CSCI 2301) Department of Computer Science Faculty of Information Technology The Islamic University of Gaza. Outline. Basic shift register functions Serial in/serial out shift registers

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Serial In/Parallel Out Shift Registers

Serial In/Parallel Out Shift Registers. 8-bit serial in/parallel out. Parallel In/Serial Out Shift Registers. 4-bit version 8-bit version. The bits are entered simultaneously!. Waveforms. Parallel In/Serial Out Shift Registers. 4-bit parallel in/serial out.

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223 views • 5 slides

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4 bit parallel - PowerPoint PPT Presentation

Shift Registers and Shift Register Counters

Shift Registers

Serial In/Parallel Out Shift Registers