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The High-Level Trigger of the ALICE Experiment

The High-Level Trigger of the ALICE Experiment. Heinz Tilsner Kirchhoff-Institut für Physik Universität Heidelberg International Europhysics Conference on High-Energy Physics 2003 Aachen. Further information: http://www.ti.uni-hd.de/HLT. Content.

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The High-Level Trigger of the ALICE Experiment

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  1. The High-Level Trigger of theALICE Experiment Heinz Tilsner Kirchhoff-Institut für Physik Universität Heidelberg International Europhysics Conference on High-Energy Physics 2003 Aachen Further information: http://www.ti.uni-hd.de/HLT

  2. Content • Physics Applications of the High-Level Trigger • Online Pattern Recognition and Event Reconstruction • Computing Infrastructure Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  3. Physics Applications I • Jet-Trigger: • Online jet trigger from TPC inspection of central Pb-Pb collisions at 200 Hz • Cone jet-finder algorithm for online • Pile-up removal: • Reconstruction of all tracks in the TPC • Reconstruction of the event vertex • Pile-up reduction by using a cut on impact parameter of tracks • Data reduction about a factor 5 • Open-charm trigger: • Momentum filter (low pt cut) • Examination of the event topology Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  4. Physics Applications II Di-Muon Trigger: Using information of the di-muon spectrometers to determine the transversal momentum  pt cut e+e- Trigger: Reconstructing J/Ψ and Y by their leptonic decays into e+e- pairs • HLT reduces event rate about a factor of 10 by: • combining TRD tracklets with TPC and ITS tracking • adding PID rejection power from TPC dE/dx Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  5. HLT Functionality • local pattern recognition (detector specific): • cluster finder • tracklets • global pattern recognition: • e.g. global tracking in TPC resulting trigger decision is based on fully analyzed and reconstructed events Time budget: Online analysis needs 12s for one eventwith dN/dY=4000 or 2400 CPUs at event rate of 200 Hz parallel processing on PC cluster Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  6. Fast Pattern Recognition • low multiplicity events • sequential feature extraction on space points • cluster finder • track follower • high multiplicity events • iterative feature extraction on raw data: • tracklet finder (Hough transform) • parallel cluster evaluation • FPGA co-processor: • releases CPU resources of host CPU • online Hough Transform is essential for trackingin dense environment Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  7. Low Occupancy • Cluster finder (FPGA): • cluster finding • centroid calculation • deconvolution • 2. Tracking (host CPU) Hardware implementation: Verification of functionality: C++ code = VHDL code • Decoder: • decoding incoming ADC sequences (ALTRO list) • calculating charge, sequence charge, and time ofa sequence • Merger: • merges sequences of adjacent pads to clusters Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  8. High Occupancy: Hough Transform Hough Transform: Transformation of coordinate space (R, Φ) to parameter space (Φ0, κ) Φ0: emission angleΚ: curvature Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  9. Hough Transform in FPGA Co-Processor Behavioral (VHDL) model of Hough Transform simulated and compared with software Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  10. Data iCache iCache pointer evt Push readout Pointers List CPU CPU / kB 92 MB/sec dCache dCache 500 small PCI 66/64FPGA Detector Derandom . Data Link Evt . Buffer FPGA Co-Prozessor PCI iCache iCache Hostbridge CPU CPU dCache dCache Network Interface Host memory PCI FPGA Co-Processor as Part of the Front-End Processor • Front-End Prozessor: • First layer of the HLT-clusters • Input for event data into the cluster (via optical link) • “normal“ PC, equipped with Read-Out Receiver Card (RORC) • FPGA: • implementing the PCIbus protocol • co-processor for online analysis Ordinary PC cluster + PCI RORC = HLT Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  11. Data Volume + Event Rates Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  12. HLT Cluster Setup Example: TPC sector achieved event rate = 430 events/s Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  13. ( Sub)Event Scatterer new event new event Publisher Publisher out Load balancing - Subscriber Subscriber Publisher Publisher Fan Publisher Publisher Data Transport within the HLT-Cluster ( Sub ) Event Gatherer new event Subscriber new event Subscriber Publisher Subscriber (Sub)Event Merger Bridging between Nodes Event m Block 0 Event m Block 1 Subs Subs Merging Code Publisher Event m Block 0, 1 … Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  14. Fault Tolerance • Software framework with embedded fault tolerance • Automatic re-configuration of the data path A B Test setup with 7 computers: C D E • Network connection disconnected • Faulty PC node is removed from data path • Spare node inserted into data path •  no single event is lost! Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  15. Prototypes • 32 dual Pentium III PCsrunning Linux • Network connection: • FastEthernet • GigaBit Ethernet • SCI Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  16. RORC: Read Out Receiver Card Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

  17. Summary • HLT enables event selection based on physical signatures • Online event analysis assisted by FPGA co-processor • HLT allows for a significant reduction of the data volume • Functional concept of the HLT exists • Fault-tolerant software successfully tested Further information: http://www.ti.uni-hd.de/HLT Heinz Tilsner - University of Heidelberg Kirchhoff Institute of Physics

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