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Development of USB-PC Test Interface and Prototype FEM for NA60 Pilot Board Testing

This project outlines the development and testing of the USB-PC test interface alongside the prototype Front-End Module (FEM) designed for the NA60 Pilot Board. The interface requires no special hardware and runs executable Visual Basic code on a Windows PC, enabling comprehensive digital pilot command execution and configuration of Pixel Chips via JTAG. The project includes the interface's integration with various configurations, including fast Ethernet communication, and aims to facilitate seamless interaction with Phenix DAQ systems and more.

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Development of USB-PC Test Interface and Prototype FEM for NA60 Pilot Board Testing

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  1. Phenix Silicon Pixel FEM S. Abeytunge C. Pancake E. Shafto H. Themann H Themann SUSB Physics & Astronomy

  2. Main Tasks • USB - PC Test Interface • Na60 Pilot Board Tests • Prototype FEM (1.6Gbits/s fast ethernet) • FEM • (3-4 channel VME version) • (Production version) H Themann SUSB Physics & Astronomy

  3. USB PC Test Interface: º No special hardware required º Visual Basic executable runs on Windows PC º Execute all Digital Pilot commands º Test and configure Pixel Chips via JTAG º Read FEM status registers º Buffered Pixel data and TDO data Current Status: Prototype USB interface built and tested Basic FPGA communication code complete Clock and Serial Commands tested with Na60 Pilot Visual Basic code ongoing development H Themann SUSB Physics & Astronomy

  4. Visual Basic Control Panel H Themann SUSB Physics & Astronomy

  5. Na60 Pilot Board Tests: º Use Pilot/Pixel test board for FEM development º Develop FPGA Code º Integrate USB test port Current Status: Basic FPGA communication code complete Clock and Serial Commands tested with Na60 Pilot Create JTAG configuration strings Readout Pixel data with Phenix DAQ (GTM, DCM) H Themann SUSB Physics & Astronomy

  6. Prototype FEM (1.6Gbits/s fast ethernet): º Develop FPGA code for 1.6Gbits/s fast ethernet º “Fast Or” Trigger extraction º Interface with RIKEN Pilot data format º Interface with SPIRO Schedule: Design / Layout Start Jun. 22, 2005 Fabrication Sep. 12, 2005 Test / Debug Oct. 5, 2005 Interface with SPIRO Oct. 17, 2005 H Themann SUSB Physics & Astronomy

  7. FEM (3-4 channel VME version): º Interface to “new” Phenix DAQ ! º Interface to “new” Phenix slow control ! º Develop “Fast Or” trigger module Schedule: Design / Layout Start Aug. 1st, 2005 Fabrication Feb. 2006 Test / Debug March 2006 H Themann SUSB Physics & Astronomy

  8. FEM (Production version): º FEM º VME trigger module Schedule: Design / Layout Start Mar. 1st, 2006 Fabrication Aug. 2006 Test / Debug Sept. 2006 H Themann SUSB Physics & Astronomy

  9. Data Generator - FEM Interface Board H Themann SUSB Physics & Astronomy

  10. USB Interface Na60 Pilot Board Interface FEM Test Interface Board H Themann SUSB Physics & Astronomy

  11. Schedule 2005 M J J A S O N D USB Test Interface Design FPGA code VB interface Na60 Pilot Board tests Board arrives at SB Interface to Pilot Readout via Phenix DAQ Prototype FEM (1.6Gbits/s) Design / Layout Fabrication Test / Debug Interface with SPIRO FEM (3-4 channel VME) Design / Layout H Themann SUSB Physics & Astronomy

  12. Schedule 2006 J F M A M J J A S O FEM (3-4 channel VME) Design / Layout Fabrication Test / Debug VTM (VME Trigger Module) Design / Layout Fabrication Test / Debug FEM (VME Production Ver.) Design / Layout Fabrication Test / Debug H Themann SUSB Physics & Astronomy

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