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i.MX Product Update

i.MX Product Update. i.MX Product Family. March 2014. Agenda. Targeted Market Industrial Focus MPU Roadmap Ecosystem i.MX 6 Information New ProductIon Introduction Conclusion. Industry’s Broadest Range Of Embedded Processor Solutions. Kinetis Microcontrollers

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i.MX Product Update

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  1. i.MX Product Update i.MX Product Family March 2014

  2. Agenda • Targeted Market • Industrial Focus • MPU Roadmap • Ecosystem • i.MX 6 Information • New ProductIon Introduction • Conclusion

  3. Industry’s Broadest Range Of Embedded Processor Solutions Kinetis Microcontrollers Design Potential. Realized Vybrid Controller Solutions Rich Apps in Real Time. i.MX Application ProcessorsYour Interface to the World. QorIQ Processors built on Layerscape ArchitectureAccelerating the Network’s IQ Industry’s most scalable ultra-low-power, mixed-signal MCU solutions based on the ARM®Cortex™-M and Cortex™-M0+ architectures. Real-time, highly integrated solutions with best-in-class 2D graphics to enable your system to control, interface, connect, secure and scale. Industry’s most versatile solutions for multimedia and display applications, with multicore scalability and market-leading power, performance & integration. Industry’s first software-aware, core-agnostic networking system architecture for the smarter, more capable networks of tomorrow – end to end. Consumer Consumer Consumer Networking Automotive Automotive Industrial Industrial Industrial Industrial Scalable Industry Standard Solutions, Software and Development Ecosystem

  4. i.MX Markets and Applications Automotive eReaders • Infotainment • Telematics • Instrument Clusters • Vision/Camera Systems • Monochrome eReader • Color eReaders Smart Devices • Tablets, Media tablets • IPTV • Smart Monitors • Media Hub • Media Phones • Printers • Appliances • Medical – Patient Monitoring • Medical tablets • Industrial tablets • Smart Energy • Factory Automation • HMI • Aerospace & Defense • Digital Signage • Scanners

  5. i.MX for General Embedded Highlights • Supply • 10-15 year longevity commitment • Industrial qualifications with expected lifetime of 10 years and is assumed to operate on a full-time basis at maximum temperature • Long history of strong partnerships with global distributors • Software • Freescale coded, tested, and supported OSs (Android, Linux, Windows Embedded) • Free software codecs and Tools optimized for Freescale solutions • Wide ecosystem to support tool chains, modules, system integrators, software and design services • Ease of Use • All generally launched products are accessible via the web. • Quicker time to market through reference designs like Home Energy Gateway, Home Health Hub. • Key features to meet industrial requirements (3.3V IO, 0.8mm pitch) to reduce system cost and complexity, improve performance, lower power consumption • Low cost development systems. • Extensive i.MX community - https://community.freescale.com/community/imx • Part of a vast portfolio of product technologies offered by Freescale • Strong HW and SW Ecosystem

  6. Freescale’s Product Longevity Program

  7. Announcing the i.MX 7 and i.MX 8 Series! • i.MX 7 Series:designed for IoT applications, point of sale products and a host of other cost-sensitive embedded applications. i.MX 7 series solutions for cost-sensitive markets will a key driver of our long-term i.MX portfolio expansion. • i.MX 8 Series Portfolio:targeting highly advanced driver information systems and other multimedia-intensive embedded applications and designed to exceed the stringent requirements of top automotive OEMs for years to come. Read Geoff Lee’s i.MX Announcement Blogat www.freescale.com

  8. i.MX Applications Processor Family Roadmap - Preliminary 40nm – ARM v7, 4x CPU; 3x GPU, 1080p60 performance 28nm – Next Generation ARM v8 Premium i.MX 8 Premium Good, Better, Best Differentiation i.MX 8 Balanced i.MX 6Quad Performance and Multimedia Capability Performance ARMv8 Balanced i.MX 8 Entry i.MX 6Dual i.MX53 i.MX 6Dual Lite i.MX51 Advanced System Integration i.MX 8 Value i.MX50 Efficiency ARMv7 Entry i.MX 7 Balanced i.MX 6Solo i.MX35 i.MX 7 Entry i.MX 6SoloLite i.MX31 i.MX 6 Next i.MX28 i.MX25 i.MX 7 Value i.MX233 2012 2013 2014 2015 Product Qual ARM9 Cortex-A8 A7+M4/M0 A5+M4 A5x+A53+M4 Production Proposal ARM11 Cortex-A9 A9+M4 A53+M4 Planning Confidential and Proprietary – NDA Only Mass Market Availability Execution Samples Production

  9. MPU Software – Release Strategy • Vybrid Linux Support • Support Vybrid Tower and AutoEVB boards using existing L3.0.35 release • Align Timesys Linux delivery for supporting IMM Vybrid parts • Unify i.MX and Vybrid Linux support • L3.0.35 Unified Linux Release • Unify i.MX 6D/Q, i.MX 6DL/S, and i.MX 6SL Linux release under a single Major Linux release L3.0.35_4.x.x • L3.0.35_4.0.0 unifies i.MX 6D/Q and i.MX 6DL/S • L3.0.35_4.1.0 unifies entire i.MX 6 Series • L3.0.35_4.2.0 unifies entire i.MX 6 Series and Vybrid • Deprecate LTIB/Ubuntu in favor of Yocto 1.4 • Release L3.0.35_4.x.x Linux Kernel under LTIB (legacy) and Yocto 1.4 • Unified Linux/Android Linux Release • Single Kernel/U-Boot upgrade L3.5.7_1.0.0 GA Release to support both Linux and Android • Single Kernel/U-Boot upgrade L3.5.7_1.0.0 GA Release to support i.MX 6 Series and Vybrid • Only Yocto 1.3 support for L3.5.7_1.0.0 GA Release

  10. Linux Roadmap LTIB (X server 1.6.1, GStreamer 0.10.35) Ubuntu 11.10 (X server 1.10.4, GStreamer 0.10.35) L3.0.35_4.1.0 Rls Date: 06-Sep-13 L3.0.35_4.0.0 Yocto 1.5 Yocto 1.4 – Poky 9.0 “Dylan” L3.0.35_2.1.0 L3.0.35_1.1.0 3.0.35 GA L3.0.35 GA 3.0.35 GA X server 1.11.4 GStreamer 0.10.36 Qt4-embedded 4.8.4 HW Floating point U-Boot v2013.04 Device Tree L3.x.x_1.0.0 GA L3.x.x_1.0.0-beta L3.x.x_1.0.0-alpha i.MX 6 Series Launch L3.10.x_1.0.0-alpha L3.5.7_1.0.0-alpha L3.y.y_1.0.0 alpha i.MX6Q/i.MX6D SabreSDB/SDP, SabreAI GA – Support for 1 year Alpha & Beta – Support until next release Execution i.MX6DL/i.MX6S SabreSDP, SabreAI Planning i.MX6SL EVK Proposed i.MX6SoloX SabreSDP

  11. Android Roadmap Google Android Releases Releases Jellybean 4.3 Jellybean 4.1 Jellybean 4.2 Key Lime Pie (Est.) “L” Android (Est.) JB4.2.2_1.1.0 3.0.35 Kernel JB4.2.2_1.0.0 3.0.35 Kernel JB4.3.0_1.0.0 GA 3.0.35 Kernel 12-Nov-13 JB4.1.2_1.0.0-beta 3.0.35 Kernel KLPx.y.z_1.0.0 L3.x.x Kernel JB4.3.0_1.0.0-beta 3.0.35 Kernel 30-Sep-13 KLPx.y.z_1.0.0-beta 3.x.x Kernel KLPx.y.z_1.0.0-alpha 3.x.x Kernel i.MX 6 Series Launch Lx.y.z_1.0.0-alpha 3.x.x Kernel JB4.2.1_1.0.0-alpha 3.0.35 Kernel Core Android Release Extended Android Release i.MX6Q/i.MX6D SabreSDB/SDP, SabreAI GA – Support for 1 year Alpha & Beta – Support until next release Execution i.MX6DL/i.MX6S SabreSDP, SabreAI Planning i.MX6SL EVK Proposed i.MX6SoloX SabreSDB

  12. Graphics Roadmap • The above features and timing set subject to change based on Vivante driver release schedule JB4.2.2_1.1.0 JB4.3.x_1.0.0 JB4.2.2_1.0.0 L3.0.35_4.1.0 L3.0.35_4.0.0 L3.0.35_2.1.0 L3.5.7_1.0.0-alpha L3.10.x_1.0.0-alpha L3.10.x_1.0.0

  13. Ecosystem

  14. Freescale EcoMAPS for i.MX Architectures Customer Application HW & SW Engineering Services Training SW Dev Tools Dev Tools Application Specific SSI fast boot Middleware IDH ODM EBS Training Partners • Compal • FIC • Foxconn • HMS • Letou • Netronix • Acsys • Adeneo • iWave • Advantech • Boundary Devices • Congatec • Digi International • iWave • Kontron • NovTech • SECO • TQ Security Operating Systems • Archermind • Pengutronix • Thundersoft i.MX Processors More Standard More Custom IDH: Independent Design House ODM Original Design Manufacturer SSI: Software & Solution Integrators IDE: Integrated Development Environment EBS: Embedded Board Solutions BDM: Background Debug Module

  15. i.MX 6: The Most Scalable Solution

  16. Red indicates change from column to the left i.MX 6 Series At a GlanceScalable series of five ARM Cortex A9-based SoC families i.MX 6Quad i.MX 6Dual i.MX 6DualLite • Quad ARM Cortex-A9 at 1.2GHz • 1 MB L2 cache, Neon, VFPvd16, Trustzone • 3D graphics with 4 shaders • Two 2D graphics engines • 64-bit DDR3 and 2-channel 32-bit LPDDR2 at 533MHz • Integrated SATA-II i.MX 6Solo • Dual ARM Cortex-A9 at 1/1.2GHz • 1 MB L2 cache, Neon, VFPvd16, Trustzone • 3D graphics with 4 shaders • Two 2D graphics engines • 64-bit DDR3 and 2-channel 32-bit LPDDR2 at 533MHz • Integrated SATA-II i.MX 6SoloLite • Dual ARM Cortex-A9 at 1.0GHz • 512KB L2 cache, Neon, VFPvd16, Trustzone • 3D graphics with 1 shader • 2D graphics • 64-bit DDR3 and 2-channel 32-bit LPDDR2 at 400MHz • Integrated EPD controller  • Single ARM Cortex-A9 at 1.0GHz • 512KB L2 cache, Neon, VFPvd16, Trustzone • 3D graphics with 1 shader • 2D graphics • 32-bit DDR3 and LPDDR2 at 400MHz • Integrated EPD controller  • Single ARM® Cortex™- A9 at 1.0GHz • 256KB L2 cache, Neon, VFPvd16, Trustzone • 2D graphics • 32-bit DDR3 and LPDDR2 at 400MHz • Integrated EPD controller  Pin-to-pin and Power Compatible Software Compatible i.MX 6 Series Highlights • ARM Cortex-A9 based solutions ranging up to 1.2GHz • HD 1080p encode and decode (except 6SL) • 3D video playback in High definition (except 6SL) • SW support: Google Android™, Windows® Embedded CE, Linux® Features vary by product family

  17. Freescale i.MX 6: unmatched pin-compatibility Freescale Competitors Pin-compatibility between families i.MX 6DualLite i.MX 6Dual i.MX 6Quad i.MX 6Solo i.MX 6Dual i.MX 6Dual Pin-compatibility inside a family (typically frequency scaling) Pin-compatibility inside a family (frequency scaling, fewer features, different qualifications)

  18. Vybrid Product Update

  19. Vybrid Controller F-Series (Industrial) Target Applications Industrial HMI Secure Control Energy Conversion Integrated Connectivity Mobile Battery Operation XGA or dual SVGA industrial HMI (2D graphics) Large or high-quality small appliance Portable patient monitor Industrial scanner or printer Simple vending machine with 2D LCD or segment display Energy grid protection, e.g. circuit breaker or monitor Infrastructure control, e.g. water treatment or gas pipeline Building control, e.g. elevator or automated door Kiosk with 2D display, e.g. gas pump Motor drive Industrial pump or fan Power inverter Appliance with motors or pumps Mobile patient care, e.g. infusion pump or respirator Wired and wireless communications protocols Energy management hub Networked HVAC Industrial vehicle with control & HMI, e.g. tractor, train, ship, heavy equipment Service robot

  20. Best Times to Select a Vybrid Controller F-Series • If the application uses up to 1.5 MB of on-chip SRAM • Eliminates or reduces external DDR memory chips (saves >$2 to $8) • Possible to support 2-layer board with LQFP package • 512 KB of SRAM is ECC-protected for sensitive control programs • Ideal for large appliance, energy grid control, service robots • When the on-chip ARM Cortex-M4 core replaces an external MCU or FPGA • Reduces components, circuit board area, and power consumption (saves >$1 to >$5) • Reuses the familiar Tower System, with free MQX RTOS and Timesys Linux OS • ARM DS-5 tools eases programming of ARM Cortex-A5 and Cortex-M4 cores • Very capable timers and ADCs ideal for real-time control, e.g. motor control • When HMI, video or audio is needed • On-chip LCD controller with 2D composition engine and PEG development platform • On-chip video ADC for direct analog camera input (saves $4-$5) • SSI audio inputs and outputs for stereo playback • When DDR3 memory is used with error-correcting code (ECC) • DDR3 is half the cost of DDR2 (saves >$1 over Atmel SAMA5D3 with no DDR3) • Vybrid DDR3 has 8-bit ECC (i.MX and Kinetis don’t have any ECC on DDR)

  21. Vybrid Platform – Non Automotive VF6xx - Up to 500 MHz Dual Heterogeneous Cores, Dual XGA LCD, Camera Interface, Graphic Support, Stereo Audio, DDR, Secure Boot, Tamper Detect, Dual USB OTG w/HS PHY, Dual Ethernet, L2 Switch Cortex-A5 + Cortex-M4 Multicore VF5xx - Up to 500 MHz SVGA LCD, Camera Interface, Graphic Support, Stereo Audio, DDR, Secure Boot, Tamper Detect, Dual USB OTG w/HS PHY, Dual Ethernet, L2 Switch Cortex-A5 Only Single Core Feature Integration VF3xx - Up to 266 MHZ WQVGA LCD, Audio, Secure Boot, Tamper Detect, USB OTG w/HS PHY, Dual Ethernet, L2 Switch, Dual Quad-SPI, NAND Flash Controller Rich Apps in Real Time Performance

  22. Vybrid VF3xx Family Debug and Trace System Core Analog 2 x 12-bit ADC Core Up to 266 MHz ARM Cortex-A5 with TrustZone HMI TFT LCD up to WVGA Segment LCD Memory 32 KB I and D L1 Cache 1.5 MB SRAM (ECC support on 512KB) NAND flash controller with 32-bit ECC Dual Quad SPI Interface Analog 2 x 12-bit ADC (12-ch), 2 x 12-bit DAC Communication 4 x UART, 2 x CAN, 3 X SPI, 2 X I2C 2 x 10/100 Ethernet MAC with IEEE 1588 and L2 Switch USB2.0 OTG with PHY Audio 3 x SAI for full-duplex serial interfaces like I2S, AC97 Enhanced serial audio interface (ESAI) Video Video Interface unit with parallel camera interface Security (optional) Tamper detect, high assurance boot Cryptographic accelerators True Random Number Generator (RNG) Power Management and Package Internal regulator (PMIC) 176-pin LQFP Industrial Qualification (-40 to +85C) JTAG AMBA NIC ARM CortexTM-A5 Up to 266 MHz 2 x 12-bit DAC Trace Internal and External Watchdog PLL DP-FPU Interrupt Router Timers Clocks NEON Flex Timer (8-ch) DMA Up to 64-ch Clock Monitors L1 I/D-Cache Flex Timer (2-ch) Flex Timer (2-ch) Trace / Debug Power Management Regulators Internal Reference Clocks IEEE 1588 Timers GIC Memory Protection Unit Periodic Interrupt Low / High Frequency Osc. Low Power Timers Memory Display & Video Communications Security (Optional) 4 x UART 2 x CAN TFT LCD Cryptography Module Boot ROM Segment LCD Tamper Detect 1.5 MB SRAM 2 x I2C 3 x DSPI Digital Video Camera Interface Secure RTC 2 x Ethernet (10/100) With IEEE 1588 Memory Interfaces Secure RTIC L2 Switch Audio NAND Flash Controller Secure RAM 1 x USB OTG + PHY ASRC Secure Fuses 2 x Quad SPI with XiP 1 x Secure Digital I/O 3 x SAI Secure WDOG External Bus Interface Up to 115 GPIO (with Interrupt) ESAI Secure JTAG

  23. Vybrid VF5xx Family Debug and Trace System Core Analog JTAG 2 x 12-bit ADC Core Up to 500MHz ARM™ Cortex-A5 with TrustZone HMI Dual TFT LCD up to SVGA resolution Memory 32KB I and D L1 Cache 1.5MB SRAM with no L2 Cache, or, 1MB SRAM with 512KB of L2 Cache (Optional) ECC support on 512KB SRAM LPDDR2/DDR3 DRAM controller (8/16-bit ECC) NAND Flash Controller with 32-bit ECC Dual Quad SPI Interface Analog 2 x 12-bit ADC(16-Ch), 2 x 12-bit DAC Communication 6 x UART, 2 x CAN, 4 X SPI, 4 X I2C 2 x 10/100 Ethernet MAC with IEEE 1588 and L2 Switch Dual USB2.0 HOST and OTG with PHY Audio 4 x SAI for full-duplex serial interfaces like I2S, AC97 ESAI – Enhanced Serial Audio Interface SPDIF Video Video Interface unit with parallel camera interface Security (optional) Secure boot and tamper detection Cryptographic accelerators True Random Number Generator (RNG) Power Management and Package Internal regulator (PMIC) 17x17 0.8mm pitch 364-pin MAPBGA Industrial Qualification (-40 to 85C) AMBA NIC ARM CortexTM-A5 Up to 500 MHz Trace 2 x 12-bit DAC Internal and External Watchdog PLL Timers DP-FPU Interrupt Router Flex Timer (8-ch) NEON Clocks Flex Timer (2-ch) DMA Up to 64-ch L1 I/D-Cache Clock Monitors Flex Timer (2-ch) L2 Cache (Optional) Flex Timer (8-ch) Power Management Regulators Internal Reference Clocks Trace / Debug IEEE 1588 Timers GIC Memory Protection Unit Periodic Interrupt Low / High Frequency Osc. Low Power Timers Memory Display & Video Communications Security (Optional) 6 x UART 2 x CAN TFT LCD Cryptography Module Boot ROM TFT LCD Tamper Detect Up to 1.5 MB SRAM 4 x I2C 4 x DSPI Digital Video Camera Interface Secure RTC 2 x Ethernet (10/100) With IEEE 1588 Memory Interfaces Secure RTIC DRAM Controller (LPDDR2 / DDR3) L2 Switch Audio Secure RAM NAND Flash Controller ASRC 2 x USB OTG + PHY Secure Fuses 4 x SAI 2 x Quad SPI with XiP 2 x Secure Digital I/O Secure WDOG ESAI External Bus Interface Up to 135 GPIO (with Interrupt) Secure JTAG SPDIF Changes from previous family

  24. Vybrid VF6xx Family System Analog Debug and Trace Core Core Up to 500MHz ARM™ Cortex-A5 with TrustZone Up to 167MHz ARM™ Cortex-M4 HMI Dual TFT LCD up to SVGA resolution Memory 32KB I and D L1 Cache for A5, 16KB I and D for M4 1.5MB SRAM with no L2 Cache, or 1MB SRAM with 512KB of L2 Cache (Optional) ECC support on 512KB SRAM 64KB TCM for M4 LPDDR2/DDR3 DRAM controller (8-bit ECC) NAND Flash Controller with 32-bit ECC Dual Quad SPI Interface Analog 2 x 12-bit ADC (16-Ch), 2 x 12-bit DAC Communication 6 x UART, 2 x CAN, 4 X SPI, 4 X I2C 2 x 10/100 Ethernet MAC with IEEE1588 and L2 Switch Dual USB2.0 HOST and OTG with PHY Audio 4 x SAI for full-duplex serial interfaces like I2S, AC97 ESAI – Enhanced Serial Audio Interface SPDIF Video Digital and Analog Video Camera Interface Security (optional) Secure boot and tamper detection Cryptographic accelerators True Random Number Generator (RNG) Power Management and Package Internal regulator (PMIC) 17x17 0.8mm pitch 364-pin MAPBGA Industrial Qualification (-40 to +85C) ARM CortexTM-A5 Up to 500 MHz JTAG 2 x 12-bit ADC AMBA NIC Trace DP-FPU 2 x 12-bit DAC Internal and External Watchdog GIC NEON Timers PLL L1 I/D-Cache Interrupt Router Flex Timer (8-ch) L2 Cache (Optional) Clocks Trace / Debug Flex Timer (2-ch) DMA Up to 64-ch Flex Timer (2-ch) Core Clock Monitors ARM CortexTM-M4 Up to 167 MHz Flex Timer (8-ch) Power Management Regulators Internal Reference Clocks IEEE 1588 Timers SP-FPU NVIC DSP Periodic Interrupt Memory Protection Unit Low / High Frequency Osc. I/D-Cache Low Power Timers Trace / Debug Memory Display & Video Communications Security (Optional) 6 x UART 2 x CAN TFT LCD Cryptography Module Boot ROM TFT LCD Tamper Detect Up to 1.5 MB SRAM 4 x I2C 4 x DSPI Digital & Analog Video Camera Interface Secure RTC 2 x Ethernet (10/100) With IEEE 1588 Memory Interfaces Secure RTIC DRAM Controller (LPDDR2 / DDR3) L2 Switch Audio Secure RAM NAND Flash Controller ASRC 2 x USB OTG + PHY Secure Fuses 4 x SAI 2 x Quad SPI with XiP 2 x Secure Digital I/O Secure WDOG ESAI External Bus Interface Up to 135 GPIO (with Interrupt) Secure JTAG SPDIF Changes from previous family

  25. i.MX ‘Next’ Platform

  26. i.MX 6SoloX Product Brief

  27. i.MX 6 SoloX Portfolio3 Product Offerings • 6X4 – Full-featured Device • Changes to 6X3: • Adds: 1x WXGA Display (LVDS), Camera Interface w/ Video ADC,12-bit ADC, MLB • Package: 19x19 0.8mm BGA • 6X3 – HMI and Connectivity • Changes to 6X1: • Adds: 1x WXGA Display (Parallel LCD), 2D/3D GPU, PCIe • Removes: 12-bit ADC, MLB • Package: 17x17 0.8mm BGA Feature Integration 6X1 – Display-less Device Cortex-A9 up to 1GHz, Cortex-M4 up to 166MHz, DDR3/LPDDR2, Dual Ethernet w/ AVB, Dual Quad-SPI, NAND Flash Controller, Secure Boot, USB OTG w/HS PHY, CAN, MLB, 12-bit ADC, Multi-channel Audio Package: 17x17 0.8mm BGA Performance and ASP

  28. Preliminary, subject to change i.MX 6X1xx Block Diagram i.MX 6SoloX Connectivity • Specifications: • CPU1: Single ARM Cortex-A9 at 800MHz - 1GHz • CPU2: Single ARM Cortex-M4 at 166MHz • Package: • 17x17, 0.8mm pitch MAPBGA • Temp Range (Tc): • Commercial: -20 to 105C Tj • Industrial: -40 to 105C Tj • Automotive: -40 to 125C Tj, AEC-Q100 Grade 3 • Key Features and Advantages • 1x Cortex-A9 800MHz-1GHz w/ 256KB L2-cache • Cortex-M4 core for system control / CAN messaging, power optimizations • 32-bit LP-DDR2, DDR3 @ 400MHz / 800MHz DDR • Dual DDR Quad SPI • USB HS Host + OTG with PHY • USB HSIC for Modem Interface • 2x Ethernet with full AVB support • 2x FlexCAN / CAN FD • Target Availability: • Samples: Q1 2014 • Production: Q4 2014 System Control CPU1 Platform MMC 4.4 / SD 3.0 x3 Secure JTAG Cortex-A9 PLL, Osc MMC 4.4 / SDXC Clock & Reset NAND (BCH40) 32KB D-cache 32KB I-cache Smart DMA UART x5 NEON PTM IOMUX I2C x3, SPI x4 256KB L2-cache Timer x3 USB2 OTG & PHY USB2 Host & PHY PWM x4 CPU2 Platform Watch Dog x2 USB2 HSIC Host Cortex-M4 Power Mgmt 2x 1Gb Ethernet + IEEE1588 +AVB LDO 16KB D-cache 16KB I-cache Temp Monitor ESAI, I2S/SSI x5 ADC S/PDIF Tx/Rx 8ch 12-bit ADC ASRC 2 x FlexCAN/FD Internal Memory MLB25/50 ROM RAM GPIO, Keypad Security RNG External Memory TrustZone 16-bit NOR Ciphers 2x DDR Quad SPI Security Ctrl 16/32 LP-DDR2 / DDR3 / DDR3L Secure RTC eFuses Updated from i.MX 6Solo

  29. Preliminary, subject to change i.MX 6X3xx Block Diagram i.MX 6SoloX Connectivity • Specifications: • CPU1: Single ARM Cortex-A9 at 800MHz - 1GHz • CPU2: Single ARM Cortex-M4 at 166MHz • Package: • 17x17, 0.8mm pitch MAPBGA • Temp Range (Tc): • Commercial: -20 to 105C Tj • Industrial: -40 to 105C Tj • Automotive: -40 to 125C Tj, AEC-Q100 Grade 3 • Key Features and Advantages • 1x Cortex-A9 800MHz-1GHz w/ 256KB L2-cache • Cortex-M4 core for system control / CAN messaging, power optimizations • 32-bit LP-DDR2, DDR3 @ 400MHz / 800MHz DDR • Vivante GC400T GPU supporting 27M Tri/s, 166M Pxl/s Open GLES 2.0 / Open VG 1.1 • Dual DDR Quad SPI • Parallel display i/f up to WXGA • 20-bit parallel camera i/f • USB HS Host + OTG with PHY • USB HSIC for Modem Interface • 2x Ethernet with full AVB support • 1x PCIe 2.0 (x1 lane) • Target Availability: • Samples: Q2 2014 • Production: Q4 2014 System Control CPU1 Platform MMC 4.4 / SD 3.0 x3 Secure JTAG Cortex-A9 PLL, Osc MMC 4.4 / SDXC Clock & Reset NAND (BCH60) 32KB D-cache 32KB I-cache Smart DMA UART x6 NEON PTM IOMUX I2C x3, SPI x4 256KB L2-cache Timer x3 USB2 OTG & PHY USB2 Host & PHY PWM x4 CPU2 Platform Watch Dog x2 USB2 HSIC Host Cortex-M4 Power Mgmt 2x 1Gb Ethernet + IEEE1588 +AVB LDO 16KB D-cache 16KB I-cache Temp Monitor ESAI, I2S/SSI x5 Graphics Graphics: OpenGL/ES 2.x, OpenVG 1.x (on 3D GPU) S/PDIF Tx/Rx ASRC BitBLT, DirectFB / GAL LCD Interfaces Internal Memory 24-bit RGB ROM RAM GPIO, Keypad Security 1x PCIe 2.0 (x1 lane) Imaging Processing RNG Resizing, Blending Inversion / Rotation External Memory TrustZone 16-bit NOR Ciphers Camera Interfaces 2x DDR Quad SPI Security Ctrl 20-bit Parallel RGB 16/32 LP-DDR2 / DDR3 / DDR3L Secure RTC eFuses Updated from i.MX 6Solo

  30. Preliminary, subject to change i.MX 6X4xx Block Diagram i.MX 6SoloX Connectivity • Specifications: • CPU1: Single ARM Cortex-A9 at 800MHz - 1GHz • CPU2: Single ARM Cortex-M4 at 166MHz • Package: • 19x19, 0.8mm pitch MAPBGA • Temp Range (Tc): • Commercial: -20 to 105C Tj • Industrial: -40 to 105C Tj • Automotive: -40 to 125C Tj, AEC-Q100 Grade 3 • Key Features and Advantages • 1x Cortex-A9 800MHz-1GHz w/ 256KB L2-cache • Cortex-M4 core for system control / CAN messaging, power optimizations • 32-bit LP-DDR2, DDR3 @ 400MHz / 800MHz DDR • Vivante GC400T GPU supporting 27M Tri/s, 166M Pxl/s Open GLES 2.0 / Open VG 1.1 • Dual DDR Quad SPI • LVDS and parallel display i/f up to WXGA • Video ADC (NTSC/PAL) plus 20-bit parallel camera i/f • USB HS Host + OTG with PHY • USB HSIC for Modem Interface • 2x Ethernet with full AVB support • 2x FlexCAN / CAN FD • 1x PCIe 2.0 (x1 lane) • Target Availability: • Samples: Q1 2014 • Production: Q4 2014 System Control CPU1 Platform MMC 4.4 / SD 3.0 x3 Secure JTAG Cortex-A9 PLL, Osc MMC 4.4 / SDXC Clock & Reset NAND (BCH60) 32KB D-cache 32KB I-cache Smart DMA UART x6 NEON PTM IOMUX I2C x3, SPI x4 256KB L2-cache Timer x3 USB2 OTG & PHY USB2 Host & PHY PWM x8 CPU2 Platform Watch Dog x3 USB2 HSIC Host Cortex-M4, MPU, FPU Power Mgmt 2x 1Gb Ethernet + IEEE1588 +AVB LDO 16KB D-cache 16KB I-cache Temp Monitor ESAI, I2S/SSI x5 Graphics ADC Graphics: OpenGL/ES 2.x, OpenVG 1.x (on 3D GPU) S/PDIF Tx/Rx 8ch 12-bit ADC ASRC BitBLT, DirectFB / GAL 2 x FlexCAN/FD LCD Interfaces Internal Memory 24-bit RGB MLB25/50 ROM 1ch LVDS RAM GPIO, Keypad Security 1x PCIe 2.0 (x1 lane) Imaging Processing RNG Resizing, Blending Inversion / Rotation External Memory TrustZone 16-bit NOR Ciphers Camera Interfaces 2x DDR Quad SPI Security Ctrl 20-bit Parallel RGB 16/32 LP-DDR2 / DDR3 / DDR3L Secure RTC Analog NTSC eFuses Updated from i.MX 6Solo

  31. Preliminary, subject to change i.MX 6SoloX Availability 2014 Oct Nov Dec Mar Apr May Jun Jul Aug Sep End-Nov MP Qual Complete (Commercial, Industrial, Automotive) Silicon *Unless otherwise noted, 17x17 and 19x19 sample schedule is the same Mid-May TO1.0 Samples 100-200pc orders End-Mar TO1.0 Samples 1-10pc orders End-Aug TO1.1 Samples 1-10pc orders Mid-Oct TO1.1 Samples 100-200 pc orders • Development Boards • *With 19x19 silicon End-Mar SABRE SDB TO1.0 1 - 5pc orders End-Aug SABRE SDB TO1.1 1 - 5pc orders End-Nov SABRE SDB GA End-Mar Alpha BSP TO1.0 Android Yocto (Linux) MQX End-May Beta BSP TO1.0 Android Yocto (Linux) MQX End-Aug Beta BSP TO1.1 Android Yocto (Linux) MQX End-Nov GA BSP TO1.1 Android Yocto (Linux) MQX • BSPs • *MQX on Cortex-M4 Docs End-Mar DS Rev A RM Rev A Errata Rev A End-Aug DS Rev B RM Rev B Errata Rev B End-Nov DS Rev 0 RM Rev 0 Errata Rev 0 Customer Enablement Alpha Boards w/ 1.1Si Alpha BSP Rev A Docs Beta Boards w/ 1.1Si Beta BSP Rev B Docs GA Boards w/ Prod Si GA BSP Rev 0 Docs

  32. i.MX 7 & i.MX 8

  33. Internet of Things: The Better Light bulb 192.168.1.1 • Device operation is transparent to the user • Device can sense/learn from its Environment • Device is trusted to transmit my data securely to trusted entities • Device is connected (always or on demand) • Some Examples • Light bulbs that change their luminance based on time, number of people in the room • Point of Sale Terminals that secure themselves • Home Controls that learn their ‘user’s’ needs for heat or cold in the home • Beds that mold themselves automatically to the person lying in them • Shopping carts that automatically sync your shopping list from home • Coffee makers that learn when to start heating up based on your personal sleep patterns • Vacuum cleaners that order new cleaning filters when your usage is typically greatest

  34. New IOT-based segments/devices require that: • Processors be inherently communications capable • To keep fresh: Ability to update, patch, download and extract information via IP transmission • To be aware: Control multiple devices via standard wireless (wifi, BT, ZigBee, IR, camera, NFC) • To be secure: Ensure data is trusted throughout the “usage” path up to the cloud • To be controlled in new ways: New app installs, service upgrades and personalization • Deliver the right performance, integration and power (Tiered Platform) • Primary use: Quiescent, low power data acquisition and wireless control(Cortex M4/M0) • Secondary Use: Full speed, end user responsiveness w/ full featured OS (Cortex Ax) • Why? Must ‘sip’ power for background tasks; Active time: rarely; Full featured OSs widen code availability • So?: Not about MIPS; more about tiered computation levels with wide SW support • i.MX 7 developed as a family to offer customer’s a scalable choice • Ability to scale performance as their needs scale  Cortex A7+M4+M0 • Ability to scale security levels  Secure boot to full PCIv4 compliance • Ability to scale I/O choice: Fast IO, dual Ethernet, multiple serial ports • Ability to scale solutions  Pin and power compatibility i.MX 7 Series

  35. i.MX 7 Family of Application Processors Two new i.MX family members built on One 28nm Low Power Platform Preliminary Preliminary Adds: 64bit DDR3, 3D and Videoacceleration, Add:A7 Core, 32bit DDR, M4 core EPD Display, PCIe Single Cortex A7, 800MHz Cortex M0+; 16bit DDR3; 2x GigE, Full Security w/ Tamper resist Industrial HMI Control Mainstream Point of Sale/Printing Home Control Basic Wearables General Embedded Control Dual Cortex A7, 800MHz Cortex M4/M0+, 2xGigE, 32bit DDR3 Full Security w/ Tamper resist eReaders High End Point of Sale/Printers Home Automation Industrial HMI with Security Wearables Dual Cortex A7, 800MHz Cortex M4/M0+, 64bit-DDR3, 3D Accel, 1080p VPU HDMI, PCIe Full Security w/ Tamper resist GFX rich Industrial HMI Digital Display Solutions Health Monitors Home Hub i.MX 7Solo i.MX 7Dual i.MX 7Next Internal FSL Only

  36. i.MX 8 Series Introduction

  37. i.MX 8 Series – preliminary Scalableseries of fiveARM v8 Cortex-A50 Series based SoC Families i.MX 8Value i.MX 8Entry i.MX 8Balanced i.MX 8Premium i.MX 8Balanced i.MX 8 i.MX 8 i.MX 8 i.MX 8 i.MX 8 Pin-to-pin Compatible Software Compatible

  38. i.MX 8 Balanced Overview - preliminary i.MX 8 Balanced i.MX 6 Dual/Quad CPU 2-4 Core A53 Over 10k DMIPS @ 1.2GHz/core lower CPU run power consumption AVB CPU 2-4-core A9 8.5k DMIPS @ 850MHz/core AVB AVB Triple Play GPU Single 3D with >2x higher performance Dedicated VG core Dual Composition Compression Cortex-M4 Triple Play GPU Single 3D Dedicated VG core Composition Engine Advanced Peripherals

  39. i.MX 8Balanced Advantages- preliminary i.MX 8 Balanced • Key Advantages: • Higher performance than i.MX 6 Dual/Quad • Power Consumption and Control • Lower CPU leakage • Lower CPU run power • Allows control gating at cluster and core levels • ARM v8 Architecture with long term support • ARM v8 extensibility to 64-bit • Hardware virtualization capability • Unmatched scalability and compatibility • Dual Cluster (x4 A53 | x1 A5x) i.MX 8Premium • Single A53 i.MX 8Entry CPU 2-4 Core A53 Over 10k DMIPS @ 1.2GHz/core lower CPU run power consumption AVB AVB AVB Triple Play GPU Single 3D with >2x higher performance Dedicated VG core Dual Composition Compression Cortex-M4 Advanced Peripherals

  40. Conclusion • ARM based Architectures Powered y Freescale • Strong Focus on Industrial • Scalable roadmap to ease product portfolio management • i.MX 6 Series decreasing customer development cost to earn time & market share

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