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2011 ITRS Emerging Research Materials [ERM] July 10-13, 2011. Michael Garner – Intel Daniel Herr – SRC. ERM Agenda July 11, 2011. ERM Agenda July 11, 2011. ERM Agenda July 12, 2011. ERM Agenda July 12, 2011. MtM ITRS Workshop – April 13, 2011.
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2011 ITRSEmerging Research Materials[ERM]July 10-13, 2011 Michael Garner – Intel Daniel Herr –SRC
MtM ITRS Workshop – April 13, 2011 • More-than-Moore Workshop at ITRS 2011 Spring Meeting • in Potsdam/Germany • (same location as ITRS spring meeting) • Target group: • ITRS community (A&P, Wireless, MEMS, …), everybodyinterested in & affected by MtM • + on invitation only: • individualsfromiNEMI, CATRENE SC Working Group, SRC, key experts fromacademia, institutes, SMEs, industry. • Forum to exchange information and viewsfromdifferent sources • to further guide, enhance, facilitateMtMroadmapping for 2011 ITRS roadmapwork (and beyond)
2010 Action Items • Top 10 difficult ERM challenges [16 nm, <16 nm] • The role of ESH in ITRS • 2011 Transitions • N-III-V & p-Ge to FEP & PIDS • N-Ge & p-III-V into ERM • 193nm EUV Extension Resist to Litho TWG? • Ultrathin inorganic Cu Barrier Materials to Interconnects • 3D Interconnect Emerging Materials Requirements • Prepare for 2011 Critical Assessments: • Alternate Channel Materials • Directed Self Assembly for Litho Extension • Novel Chip to Package Interconnects • Novel Cu Extension Materials
2010 ERM Participants Prashant Majhi Intel Witek Maszara Global Foundry Francois Martin LETI Fumihiro Matsukura Tohoku U. Nobuyuki Matsuzawa Sony Jennifer Mckenna Intel Claudia Mewes U. Alabama Yoshiyuki Miyamoto NEC Andrea Morello UNSW Boris Naydenov U. Stuttgart Paul Nealey U. Wisc. Kwok Ng SRC Fumiyuki Nihey NEC Yoshio Nishi Stanford U. Dmitri Nikonov Intel Yaw Obeng NIST Chris Ober Cornell Univ Katsumi Ohmori. TOK Yoshichika Otani Riken Inst. Jeff Peterson Intel Alexei Preobrajenski Lund Univ. Victor Pushparaj AMAT Ganapati Ramanath RPI Ramamoorthy Ramesh U.C. Berkeley Nachiket Raravikar Intel Heike Riel IBM Dave Roberts Nantero Mark Rodwell UCSB Sven Rogge Delft U. Jae Sung Roh Hynix Tadashi Sakai Toshiba Gurtej Sandhu Micron Krishna Saraswat Stanford U. Hideyki Sasaki Toshiba Nanoanalysis Shintaro Sato AIST Akihito Sawa AIST Barry Schechtman INSEC Thomas Schenkel LBNL Sadasivan Shankar Intel HiroAkinaga AIST Jesus de Alamo MIT Tsuneya Ando Tokyo Inst. Tech Dimitri Antoniadis MIT Nobuo Aoi Panasonic Koyu Asai Renesas Asen Asenov U. of Glasgow Yuji Awano Keio Univ David Awschalom UCSB. Kaustav Banerjee UCSB Daniel-Camille Bensahel ST Micro Stacey Bent Stanford U. Kris Bertness NIST Bill Bottoms Nanonexus George Bourianoff Intel Rod Bowman Seagate Alex Bratkovski HP Robert Bristol Intel Bernard Capraro Intel John Carruthers Port. State Univ. An Chen Global Foundry Eugene Chen Grandis Zhihong Chen IBM Toyohiro Chikyo NIMS Byung Jin Cho KAIST U-In Chung Samsung Luigi Colombo TI Hongjie Dai Stanford U. Thibaut Devolder Univ. Paris Sud Athanasios Dimoulas IMS Greece Catherine Dubourdieu L. Mat. Genie Phys. & IBM John Ekerdt U. of Texas Tetsuo Endoh Tohoku Univ. James Engstrom Cornell U. Michael Flatte U. Iowa Satoshi Fujimura TOK Michael Garner Intel Niti Goel Intel Michael Goldstein Intel Suresh Golwalkar Intel Wilfried Haensch IBM Dan Herr SRC Hiro Hibino NTT Bill Hinsberg IBM Judy Hoyt MIT Jim Hutchby SRC Ajey Jacob Intel David Jamieson U. Melbourne Ali Javey U.C. Berkeley James Jewett Intel Berry Jonker NRL Xavier Joyeux Intel Ted Kamins Consultant Zia Karim AIXTRON AG Takashi Kariya Ibiden Masashi Kawaski Tohoku U. Leo Kenny Intel Philip Kim Columbia U. Sean King Intel Atsuhiro Kinoshita Toshiba Michael Kozicki ASU Mark Kryder CMU Yi-Sha Ku ITRI Hiroshi Kumigashira U. Tokyo Y.J. Lee Nat. Nano Lab TW Liew Yun Fook A-Star Wei-Chung Lo ITRI Louis Lome IDA Cons. Gerry Lucovsky NCSU Mark Lundstrom Purdue U. Yale Ma Seagate Blanka Magyari-Kope Stanford U. Allan MacDonald Univ. of Texas Mizuki Sekiya AIST Matt Shaw Intel Takahiro Shinada Waseda Univ. Michelle Simmons UNSW Kaushal Singh AMAT Jon Slaughter Everspin Bruce Smith RIT Tsung-Tsan Su ITRI Maki Suemitsu Tohoku U. Naoyuki Sugiyama Toray C-Y Sung IBM Raja Swaminathan Intel Michiharu Tabe Shizuoka U. Hidenori Takagi U. of Tokyo Shin-ichi Takagi U. of Tokyo Koki Tamura TOK America Ian Thayne U. of Glasgow Yoshihiro Todokoro NAIST Yasuhide Tomioka AIST Mark Tuominen U. Mass Peter Trefonas Dow Ming-Jinn Tsai ITRI Wilman Tsai Intel Ken Uchida Tokyo Tech Yasuo Wada Toyo U Vijay Wakharkar Intel Kang Wang UCLA Rainer Waser Aacken Univ. Jeff Welser IBM/NRI C.P. Wong GA Tech. Univ. H.S. Philip Wong Stanford U. Dirk Wouters IMEC Wen-Li Wu NIST Hiroshi Yamaguchi NTT Toru Yamaguchi NTT Chin-Tien Yang ITRI Hiroaki Yoda Toshiba Jiro Yugami Renasas SC Zhang Stanford U. Yuegang Zhang LBNL Victor Zhirnov SRC Paul Zimmerman Intel
Logic • Logic • Alternate Channel Materials • Beyond CMOS Charge Based • Beyond CMOS Noncharge nonFET • Memory
n-Ge Key Messages • n-Ge channels show mobility enhancements when prepared with ozone-oxidized surfaces <400 cm2/V-s. • No results yet for full integration into Si MOSFET channels with high-k gate dielectrics • In addition S/D parasitic and contact resistances will need to be reduced to see these improvements
p-III-V Key Messages • p-InGaSb channels show mobility enhancements when prepared in strained heterostructure 800-1500 cm2/V-s • Need to evaluate potential for p-InGaAs (strain) • No results yet for full integration into Si MOSFET channels with high-k gate dielectrics • In addition S/D parasitic and contact resistances will need to be reduced to see these improvements
Alternate Channel MaterialsKey Messages Etched Nanowires Surface roughness & Dit limit mobility in addition to confinement Mobility: square NW (etched) have better mobility than circular NW (etched & H2 annealed) Higher Dit for circular compared to square NWs NW diameter down to <3nm demonstrated, pitch limited by lithography. Fabrication CMOS compatible, similar to FINFET technology
Alternate Channel Materials Key Messages Grown Silicon Nanowires Offer FEOL-compatible growth temperature Need to demonstrate improved mobility over etched structures Catalytic growth continues to be a problem (Au is most reproducible, but is incompatible with silicon) Issues of growth yield and control of direction & orientation below 10nm diameter (Not adequately investigated & characterized) High density needs to be demonstrated Grown III-V Nanowires Offer possibility to integrate III-V on Si platform
Nanowire Metrology Improve Metrology to measure directly on the nanowire • Carrier density • Mobility • Dopant concentration and distribution • Interface state density Dit • Metrology needed for Qf • Contact resistance • Surface passivation • Reliability
CNT Key Messages • Growth on quartz & Transfer • ~20 CNTs/µm • Transfer to silicon is tedious • Control of bandgap in growth is difficult • Chemical improvement of semiconductor content approaching 99%
Graphene Key Messages • Need reasonable generation of a Bandgap • RF doesn’t need a bandgap (MtM Mixer) • Width (2nm) • Vertical Electric Field • Chemical surface functionalization • Substrate interactions (Ir, BN, etc.) • Anisotropic strain (Modeling) • Recent angle resolved photoemission 330mV Eg • Graphene on Ir surface “cluster” superlattice • Mobility • High mobility for suspended films • Mobility Degrades on most substrates • BN substrate looks promising for mobility
Graphene Continued • Growth • SiC growth (Si sublimation) • CVD on Cu & Ni • CVD on quartz & SiO2, BN • Need continuous film • Defects need to be controlled • High k dielectric interface to graphene • Al2O3 Interfacial Layer (deposit Al, oxidize, deposit high κ) • Graphene Contact Resistance • ~5E-6 Ω-cm2 (Ni), 1E-5 to 1E-2 Ω-cm2 (Cr/Au, Ti/Au) Nagashio, et. al. • ~1-5 E-5 Ω-cm2 (Ni) Vogel, et. al.
Critical Assessment • Returned Surveys are Low
Beyond CMOS • Materials for Charge based Beyond CMOS • Materials for Non-FET, Non-Charge-Based Beyond CMOS
Materials for Charge based Beyond CMOS • Spin FET* and Spin MOSFET* • Impact Ionization MOS (IMOS) • MEMS • Atomic Switch • Electronic Phase Transition Mott FET *Requires “Spin Materials”
Mott Transition Materials • VO2: Undergoes an insulator-metal transition close to the structural phase transition • Can be electronically switched when close to the crystal phase transition • The field must be maintained to keep the material in the metallic state and the temperature must be maintained below the crystal phase transition • Oxygen stoichiometry must be controlled in thin films close to VO2.
Materials for Non-FET, Non-Charge-Based Beyond CMOS • Devices • Spin Wave Devices* • Nanomagnetic Logic* • Excitonic FET • BISFET* • Ferroelectric Negative Cg • Spin Torque Majority gate* • All Spin Logic* *Requires “Spin Materials”
MTJ • STT RAM with polarization in plane is more mature • STT-RAM with perpendicular polarization is in competitive development • Lack of consensus on magnetic materials is limiting progress • Need magnetic materials with increased perpendicular magnetization and lower damping • Significant improvement in interface roughness and edge damage to reduce damping • Reduce defects in MgO tunnel barriers and improve thickness uniformity (0.9 to 1.2nm thickness) • Many of these are technology development issues vs. emerging research materials issues
MTJ Materials • MgO thickness must be controlled • For continued scaling, need magnetization out of film plane • High magnetization • Low damping • High anisotropy • Modeling indicates • Low Damping: (CoFe)0.75Ge0.25
Semiconductor Materials • FM Semiconductors • Update Tc for FM semiconductors • Status of nanomaterial Tc
Oxide Definitions • Transition Metal Oxides • Oxides with only transition metals • Complex Metal Oxides • Metal oxides with a transition metal and non-transition metal • Metal oxides with electronic phase transitions • Multiferroics • Materials with two or more of the following coupled properties • Ferroelectric, ferromagnetic, ferroelastic, ferrotoroidal, antiferromagnetic
Strongly Correlated Electron State Materials • Mott Transition Materials (VO2) • Progress in electric control of phase transition • Electric Polarization Coupled to AFM coupled to FM metals • Improved coupling of electric field to magnetization • Magnetoelectric materials • LSMO, Superlattices • Need higher RT magnetization • Double Perovskites have higher magnetization, but not coupling of electric and magnetic properties • Novel SCEM Interface Phenomenon • 2D Electron gas etc. • “Dead Layer” thickness at interfaces
Memory Materials • Memory Materials • Storage Class Memory Materials • Select Devices
Memory Materials • FE FET Memory • FE Polarization ReRAM • Nanoelectromechanical (NEMM) • Redox RAM • Mott Memory • Macromolecular • Molecular
Ferroelectric Memories • Update • Strongly Correlated Electron State Materials • Interfaces
Redox RAM • Status: Models exist for two different redox material devices • Metal filament for cation diffusive electrodes • Cu, Ag • Vacancy filament for oxygen vacancy based devices (TiO2) • Pt or Ti electrodes • “Inert” vs. oxygen interacting electrodes • Forming Process • “Vacancy” filaments • Other mechanisms may exist dominate in other oxides • Switching (Set & Reset) • Need experiments to verify that the Redox operating mechanism models are correct.
Redox Continued • Need to experimentally verify the physical state of filaments • Single filament vs. multiple sub-filaments • Need experiments to verify the switching mechanism • Role of vacancies • Role of thermal heating • Questions raised about Ti interstitials • Need to resolve • Single crystal mechanisms may be minor in polycrystalline or amorphous materials • Analysis needs to differentiate between the experimental results in these types of materials
Assembly & Package • 3D Interconnects • Filling high aspect through hole vias (20:1) • Chip Attach Conductor Materials with Thermal Hierarchy • Materials to manage Stress and Thermal • Self Aligning Technologies • Zero Residue Adhesives • Assembly Materials • Multiple Property Polymers (CTE, Modulus, thermal conductivity, electrical properties & reliability) • Thermal & Stress Management Materials • 1D Interconnects (Low assembly temperature)
Assembly & PackageKey Messages • 3D ERM Focus • Materials with a thermal hierarchy for assembly • Chip attach materials: Nanosolders have potential for thermal hierarchy • Need flux to eliminate surface oxide on nanoparticles • Electrically insulating materials with high thermal conductivity • Designing Polymer Properties • Additions of small amounts of nanomaterials can change properties • Modulus, thermal conductivity, and other mechanical properties • BUT, CTE appears to depend on volume % of material • Zero moisture absorption (Potential polymer additive) • Ion immune
Assembly & Package • CNTs for Chip Attach • Progress on increasing the density • Method to transfer CNT bundles • Achieving low contact resistance remains the major issue • Chip Attach materials with thermal hierarchy • Nanometals melt at lower temperatures due to surface energy • Initial melting may be surface fusion that doesn’t form complete melting • Need to evaluate mechanical strength at different stages • Potential shrinkage upon final joint formation • Surface oxide layers could inhibit the surface melting • May require development of new fluxes to break down oxides
Assembly & Package • Thermal Interface Materials • CNTs in polymers can increase thermal conductivity • CNT thermal contact resistance continues to be a problem • CNTs also decrease the electrical resistivity: would limit use in 3D interconnects
Litho Materials • Keeping 193nm and EUV resist in ERM • DSA Critical Assessment • DSA Intermediate Applications • October 20, 2010 Kobe, Japan • http://www.sematech.org/meetings/announcements/9025/ • DSA as Litho Extension (Advanced) • SPIE San Jose, CA March 4, 2011
Litho Materials Key Messages • Directed Self Assembly • Progress on assembly of critical features • Recent progress on defect densities (<25cm-2) • Can defects approach ITRS requirement(<0.01cm-2) • Need defect metrology capable of characterizing defects in: • “Developed” DSA materials • Many issues are engineering vs. fundamental • Imprint polymers: Adhesion to substrate, but not the tool
DSA Workshop I • Only know intermediate application of DSA is to generate imprint masters for patterned media for Mass Storage (HDD) • DSA Graphoepitaxy vs. Surface Energy depends on the application • Solvent annealing accelerates DSA and moves to kinetics vs. thermodynamic limits. • Need to understand better • The major potential limiter to DSA adoption is defects • Fundamental question is whether defects can be reduced to <0.01cm-2 • Metrology with ability to characterize defects over large areas is a major limiter
DSA Workshop II • Goal: Determine what is required to answer the defect question • Defect Density: IBM & Applied Presented defect densities <25cm-2 • Metrology: What metrology could be applied to large area defect density characterization? • Modeling: Can it predict defect densities over large areas? • It can predict the energetics of forming specific defects with defined boundary conditions
DSA Critical Assessment • Critical Assessments by Application • Criteria & Weighting depend on the application • Potential Intermediate Litho Applications • Contact or via CD Control • LER Improvement • Sub16nm lithography patterning
Metrology Key MessagesCont. • Examples of applications • Nanowire Mobility Dit, & Qf. • Redox filament structures (density, location) • The switching mechanism in Redox cells • Defect density over large areas • Graphene, CNTs, etc. • Spin properties (Room Temperature) • Correlation between structure and polarization, etc. • Nanoscale electronic properties (EELS?) • Large area DSA detect characterization capability • Sub 20nm features in thin polymers
Metrology Key Messages • Need characterization • Structural Characterization (atomic level, roughness, grain boundaries, etc.) • Strain • Chemical & Bonding (3D atomic level, dopants, vacancies, dangling bonds) • Electrical characterization (local properties, i.e. Kelvin probe, etc.) • Potential New Capabilities(can they be applied to above problems?) • He Ion Microscope, Argon ion Microscope • PEEM
Metrology • III-V & Ge Transition to FEP & PIDS • STT RAM Transition to FEP & PIDS • Tunnel Dielectric • Magnetic layers and interfaces • Damage at edges of magnetic materials and tunnel dielectric • Redox RAM • Local characterization of oxygen vacancies, vacancy filaments, and metal filaments in operation • Real device dimensions and structures • Deterministic Doping • Characterize dopants in 3D • Dopant vacancies and interstitials • Directed Self Assembly • Defect detection and characterization over large areas • Graphene • Defects in CVD Graphene • Mobility & Substrate Interactions • Bandgap Measurement (Strain, etc.)
Modeling & Simulation • N-InGaAs & p-Ge Transitioning to FEP & PIDS • ERM adding p-III-V & n-Ge • Redox RAM & STT getting more attention • PIDS adding STT • Modeling of Filament formation in oxide Redox • Single crystal vs. polycrystalline materials (grain boundaries) • Formation process • Switching mechanism & operation • Directed Self Assembly design rules and tools • Pattern Density multiplication • Defect modeling over large areas • 2018 Potential Intercept