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Digital Acquisition: State of the Art and future prospects January 2017 Marco Locatelli

ISO 9001:2008 CERT. N. 9105.CAEN. Digital Acquisition: State of the Art and future prospects January 2017 Marco Locatelli marco@caentech.com. Introduction. CAEN Digital Acquisition History. Started in early 2000s to replace Analog instrumentation

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Digital Acquisition: State of the Art and future prospects January 2017 Marco Locatelli

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  1. ISO 9001:2008 CERT. N. 9105.CAEN Digital Acquisition: State of the Art and future prospects January 2017 Marco Locatelli marco@caentech.com

  2. Introduction CAEN Digital Acquisition History • Started in early 2000s to replace Analog instrumentation • Rapidly grew to include different models with different sampling rates, resolutions and inputs • NIM/VME/Desktop form factor, to keep on working with existing instrumentation • Designed with features especially for Physics community (Triggering methods, scalability, logic…) • PROS: • . Electronics chain simplified • . Flexibility • . Data saving and storing • CONS: • . Learning Curve • . Data amount • . Limit of on-line processing Reproduction, transfer, distribution of part or all of the contents in this document in any form without prior written permission of CAEN S.p.A. is prohibited

  3. Introduction Users Developments The increase in the use of the proposeddigitalsolutiondrove successive developments • on-line algorithms for Digital Pulse Processing: • PulseHeight Analysis, PulseShapeDiscrimination, • Charge Integration, Zero Suppression • Increased trigger logic on board (And, Or, Majorities, coincidence…) betweenchannels or with externalsignals • Direct readout for maximum speed • Ad hoc firmware customizatiom From a general purposeproduct, to applicationspecificproduct Reproduction, transfer, distribution of part or all of the contents in this document in any form without prior written permission of CAEN S.p.A. is prohibited

  4. State Of The Art A complete set of Flash ADC and Switched Capacitor Digitizers with dedicated DPP and SW • Nuclear Physics, Neutrino, Dark Matter, Nuclear Engineering, Medical Physics…. • Multichannel from 1 to 64 channels per board • From 62.5 MS/s to 5 GS/s, from 10-bit to 14-bit • Siliconand Germanium detectors, Solid, Liquid, Plastic Scintillators + PMT and SiPMs, Gas detectors… • Energy (Charge integration or Pulse Height) and Time calculation on board (Digital CFD) • Form Factor-less • Synchronization of tens of digitizers at once • Waveform and DPP Mode Reproduction, transfer, distribution of part or all of the contents in this document in any form without prior written permission of CAEN S.p.A. is prohibited

  5. State Of The Art A typical Full Digital Setup – Experiment Size • Multiple digitizers in one or more VME crates read out by 1 computer @ 350 MB/s • One 4 link A3818 PCIecard • VME crate just for power and mechanics (no backplane communication) • Can transfer waveforms or lists processed by CAEN proprietary DPP-PHA/CI/PSD algorithm • Multicore High Speed Computers, SSDs with lots of memory • Integration in facility/experiment DAQ SW Reproduction, transfer, distribution of part or all of the contents in this document in any form without prior written permission of CAEN S.p.A. is prohibited

  6. What’s next? What this experience can tell us about future developments? • Technology advance driven • Electronics side: • New ADCs, new larger FPGA, tools for customer FPGA programming, advanced faster readout (10 Gb Ethernet, new Optical protocol…). • ?New form factor? • ?which sampling rate/resolution expected? • Detector side: • Denser arrays expected due to new detectors like SiPM and large channel counts  ASIC based boards? • Faster detectors  improved timing capabilities required Reproduction, transfer, distribution of part or all of the contents in this document in any form without prior written permission of CAEN S.p.A. is prohibited

  7. What’s next? What this experience can tell us about future developments? • Customer Requests • Specific application: • A custom development/modification that becomes a standard feature • New techniques that need new features • Examples: Decimation, Zero Suppression… «I would like 10 GS/s, 16 bit, 1 GB/s true transfer rate, 32 channels, open FPGA with easy programming, 100 $ per channel» • Facility Requests (CERN, FRIB, FNAL, JLAB, EIC…) • Standard features request: • Selection of a new Form Factor • Compatibility to existing infrastructures or future developments • (Ethernet or other protocols, form factors…) • Compatibility with existing or future DAQ Softwares. Reproduction, transfer, distribution of part or all of the contents in this document in any form without prior written permission of CAEN S.p.A. is prohibited

  8. What’s next? The result? We mix all the ingredients together ElectronicsDevelopments Laboratoriesrequests CustomerRequests Detector Developments New applications To obtain a new, general purpose but highly customizable solution for next gen Physics experiments at a price sustainable by the community Reproduction, transfer, distribution of part or all of the contents in this document in any form without prior written permission of CAEN S.p.A. is prohibited

  9. Thank you!!! Reproduction, transfer, distribution of part or all of the contents in this document in any form without prior written permission of CAEN S.p.A. is prohibited

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