
Computer Systems & Networks. I – Computer Systems Roger Webb (13DJ01) R.Webb@surrey.ac.uk. Syllabus. Introduction Computer Interconnection Structures Internal & External Memory Input & Output Operating Systems – part 1 Operating Systems – part 2 Computer Arithmetic – part 1
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Computer Organisation & Architecture – William Stallings
Early Computing Devices: (8000BC – 1600)
8000 BC Tally Bones/Sticks
History of Computing:
Computer:- a person who performs computations
5000 BC – Sumeria – Abaq (writing in dust)
3000 BC – China - the Abacus
800 BC – Abax arrives in Europe
1594 – John Napier natural logs
History of Computing:
Mechanical Computers: (1600-1800)
1615 – Slide Rule – William Oughtred
1617 – Napier’s Bones
1642 – Pascaline - Blaise Pascal
1804 – Punch Card Loom
– Jacquard
History of Computing:
Electro-Mechanical Computers: (1800-1890)
1833 – Difference Engine – Babbage
- to make accurate trig and log tables
- never actually finished – “of no use to science”
1842 – Analytic Engine (programmable version)
(1991 Science Museum spent £400,000 to build working model of simplified Difference Engine – 3tons, 6’ high and 10’ long)
1840 – Lady Ada Lovelace
– 1st programmer
- suggested that Babbage’s engine could be programmed using punch cards
History of Computing:
Mechanical Computers: (1890-1920)
1890 – Holerith’s Tabulating Machine
- punch card data for sorting census data
1906 – Lee De Forest invents vacuum tube (triode)
1911 – Holerith founds Tabulating Machines Company
1924 – Renamed International Business Machines Corporation (IBM) by Thomas J. Watson
History of Computing:
Electro-Mechanical Computers: (1920-1945)
1920 – Punch Card Technology
1944 – Mark I (Harvard)
similar to Babbage engine.
IBM: “electro-mechanical computers will never replace punched card-equipment”
1943 – Colossus (Bletchley Park)
History of Computing:
Electronic Computers: (1940-1950)
1942- First Electronic Computer - ABC
uses base-2 number system, memory and logic circuits built from vacuum tubes
IBM: “we will never be interested in an electronic computing machine”
1945:“I think there is a world market for maybe 5 computers” Chairman IBM
1946 – ENIAC (Electronic Numerical Integrator &
Computer)
to compute trajectory tables for the army (only 20%
of bombs got within 1000ft)
ENIAC’s 18,000 vacuum tubes dimmed the lights
of Philadelphia when switched on
Used in building first atomic bomb tests at Los Alamos
Calculated pi to 2000 places in seventy hours
Operated in decimal
Arithmetic and Logic Unit
Input
Output
Equipment
Main
Memory
Program Control Unit
History of Computing:
Electronic Computers: (1940-1950)
1947- First Computer “Bug”
moth found in Mark II relay
causing malfunction – hence “debugging”
1947 – Transistor
Schockley, Bardeen & Brattain
paves the way for smaller, low power
and more stable systems to be built using same designs but replacing valve technology with transistor technology
IAS – Institute of Advanced Study (Princeton) 1952
Basic Von Neuman Architecture:
Central Processing Unit
Arithmetic and Logic Unit
Accumulator
MQ
Arithmetic & Logic Circuits
MBR
Input
Output
Equipment
Instructions
& Data
Main
Memory
PC
IBR
MAR
IR
Control
Circuits
Address
Program Control Unit
History of Computing:
Electronic Computers: (1950-70)
1954 - First commercial silicon transistor
Texas Instruments
1958- First Integrated Circuit
Jack Kilby from Texas Instruments
made simple oscillator
1971 – 1st Microprocessor -Intel
Intel (1968) make 4004 processor to do job of 12 chips
1972 – Pioneer 10 uses 4004 chips
intel 4004 is first uprocessor to asteroid belt...
History of Computing:
1st Generation Computers: (1950-60)
Using Valve Technology
1951 - First Commercial Computer
UNIVAC–1
correctly forecast US election in 1951 after
only 5% of vote was in
1953- IBM 701
1st attempt from IBM
1954 – IBM 650
2nd attempt made as upgrade of punch card machines estimated total market as 50 – sold 1000...
History of Computing:
2nd Generation Computers: (1960-65)
Using transistor technology
1958 – Univac – NTDS
32kwords memory, 10,702 transistors, $500,000, 25kw
1960 – PDP 1
4kwords memory – CRT display
first two player computer game – spacewar (1962)
1963 – PDP 8
$18,000 by 1971 25 companies making mini-comp
History of Computing:
3rd Generation Computers: (1965-70)
Using Integrated Circuits
1964 – IBM System 360
Upward compatibility - no need to redevelop when upgrading
1966 – Funding for ARPA net
The beginnings of the internet
1967 – First Handheld Electronic Calculator
80486
Pentium 4
History of Computing:
4th Generation Computers: (1971- )
Using Large Scale Integrated Circuits
1971 – LSI ICs
several thousand transistors on a chip
1971 – Intel invent Microprocessor
1980’s– VLSI ICs
several tens of thousands of transistors
Core
Memory
DRAM
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Computer Organisation & Architecture – William Stallings
Arithmetic and Logic Unit
Input
Output
Equipment
Main
Memory
Program Control Unit
What is a program?
A sequence of steps
For each step, an arithmetic or logical operation is done
For each operation, a different set of control signals is needed
Function of Control Unit
Top Level View
Central Processing Unit
Arithmetic and Logic Unit
MQ
Accumulator
Arithmetic & Logic Circuits
MBR
Input
Output
Instructions
& Data
Main
Memory
IBR
PC
MAR
IR
Control
Circuits
Address
Program Control Unit
Central Processing Unit
Arithmetic and Logic Unit
MQ
Accumulator
Arithmetic & Logic Circuits
MBR
Input
Output
Instructions
& Data
Main
Memory
IBR
PC
MAR
IR
Control
Circuits
Address
Program Control Unit
Memory Connection
Buses
Address bus
Control Bus
Single Bus Problems
Centralised Arbitration
Distributed Arbitration
Each module may claim the bus
Control logic on all modules
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Computer Organisation & Architecture – William Stallings
Location
CPU – Internal - External
Unit of Transfer
Organisation
Physical arrangement of bits into words
Not always obvious
e.g. interleaved
The Bottom Line
1 bit per chip per word
Larger Memory Size
Locality of Reference
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Computer Organisation & Architecture – William Stallings
Address bus
Data bus
Control bus
I/O Module
Links to Peripheral Devices
I/O Steps
CPU checks I/O module device status
I/O module returns status
If ready, CPU requests data transfer
I/O module gets data from device
I/O module transfers data to CPU
Variations for output, DMA, etc.
Input Output Techniques
Programmed
Interrupt driven
Direct Memory Access (DMA)
Programmed I/O - detail
CPU requests I/O operation
I/O module performs operation
I/O module sets status bits
CPU checks status bits periodically
I/O module does not inform CPU directly
I/O module does not interrupt CPU
CPU may wait or come back later
Addressing I/O Devices
Under programmed I/O data transfer is very like memory access (CPU viewpoint)
Each device given unique identifier
CPU commands contain identifier (address)
Interrupt Driven I/O - Basic Operation
CPU issues read command
I/O module gets data from peripheral whilst CPU does other work
I/O module interrupts CPU
CPU requests data
I/O module transfers data
Design Issues
Multiple Interrupts
Each interrupt line has a priority
Higher priority lines can interrupt lower priority lines
If bus mastering only current master can interrupt
DMA Function
Additional Module (hardware) on bus
DMA controller takes over from CPU for I/O
DMA
Controller
I/O
Device
I/O
Device
Main
Memory
CPU
DMA
Controller
DMA
Controller
Main
Memory
CPU
I/O
Device
I/O
Device
I/O
Device
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Computer Organisation & Architecture – William Stallings
Layers
Early Systems
Multi-programmed Batch Systems
I/O devices very slow
When one program is waiting for I/O, another can use the CPU
Multi-Programming with 2 Programs
Process States
Advantages of Segmentation
Simplifies handling of growing data structures
Allows programs to be altered and recompiled independently, without re-linking and re-loading
Lends itself to sharing among processes
Lends itself to protection
Some systems combine segmentation with paging
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Computer Organisation & Architecture – William Stallings
Benefits
1011 Multiplicand (11 dec)
x 1101 Multiplier (13 dec)
1011 Partial products
0000 Note: if multiplier bit is 1 copy
1011 multiplicand (place value)
1011 otherwise zero
10001111 Product (143 dec)
Note: need double length result
1 0 1 1
0 0 0 0
1 1 0 1
Initial Values
If this digit is a one then
add multiplicand
Shift A and Q right
1 0 1 1
0 0 0 0
1 1 0 1
First Cycle
1 0 1 1
If this digit is a one then
add multiplicand
Shift A and Q right
First Cycle
1 0 1 1
1 0 1 1
1 0 1 1
1 1 0 1
If this digit is a one then
add multiplicand
Shift A and Q right
1 0 1 1
0 1 0 1
1 1 1 0
First Cycle
1 0 1 1
If this digit is a one then
add multiplicand
Shift A and Q right
1 0 1 1
0 1 0 1
1 1 1 0
Second Cycle
0 0 0 0
If this digit is a one then
add multiplicand
Shift A and Q right
1 0 1 1
0 1 0 1
1 1 1 0
Second Cycle
0 0 0 0
If this digit is a one then
add multiplicand
Shift A and Q right
1 0 1 1
0 0 1 0
1 1 1 1
Second Cycle
0 0 0 0
If this digit is a one then
add multiplicand
Shift A and Q right
1 0 1 1
0 0 1 0
1 1 1 1
Third Cycle
1 0 1 1
If this digit is a one then
add multiplicand
Shift A and Q right
1 0 1 1
1 1 0 1
1 1 1 1
Third Cycle
1 0 1 1
If this digit is a one then
add multiplicand
Shift A and Q right
1 0 1 1
0 1 1 0
1 1 1 1
Third Cycle
1 0 1 1
If this digit is a one then
add multiplicand
Shift A and Q right
1 0 1 1
0 1 1 0
1 1 1 1
Fourth Cycle
1 0 1 1
If this digit is a one then
add multiplicand
Shift A and Q right
1 0 1 1
0 0 0 1
1 1 1 1
Fourth Cycle
1 0 1 1
1
If this digit is a one then
add multiplicand
Shift A and Q right
Fourth Cycle
1 0 1 1
1 0 1 1
1 0 0 0
1 1 1 1
If this digit is a one then
add multiplicand
Shift A and Q right
Shift A and Q right
If different
If 0-1 then Add M
If 1-0 then Subtract M
Shift A and Q right
An-1 An-2 and remains in An-1
Quotient
00001101
Divisor
1011
10010011
Dividend
1011
001110
Partial
Remainders
1011
001111
1011
Remainder
100
Biased
Exponent
Significand or Mantissa
Sign bit
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Computer Organisation & Architecture – William Stallings
Elements of an Instruction
Instruction Representation
Number of Addresses (a)
Number of Addresses (c)
Logical
Bitwise operations
AND, OR, NOT
Conversion
E.g. Binary to Decimal
Systems Control
Privileged instructions
CPU needs to be in specific state
For operating systems or compiler use
Address Value (1) Value(2)
184 12 78
185 34 56
186 56 34
187 78 12
i.e. read top down or bottom up?
12
12
34
34
56
56
78
78
184
187
186
185
186
185
184
187
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Computer Organisation & Architecture – William Stallings
Instruction
Opcode
Operand
Instruction
Opcode
Address A
Memory
Operand
Instruction
Opcode
Address A
Memory
Pointer to operand
Operand
Instruction
Opcode
Register Address R
Registers
Operand
Instruction
Opcode
Register Address R
Memory
Registers
Operand
Pointer to Operand
Instruction
Address A
Opcode
Register R
Memory
Registers
+
Pointer to Operand
Operand
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Computer Organisation & Architecture – William Stallings
User Visible Registers
General Purpose
Data
Address
Condition Codes
How big?
Control & Status Registers
Program Counter
Instruction Decoding Register
Memory Address Register
Memory Buffer Register
Revision: what do these all do?
Indirect Cycle
May require memory access to fetch operands
Indirect addressing requires more memory accesses
Can be thought of as additional instruction subcycle
Improved Performance
Multiple Streams
Have two pipelines
Prefetch each branch into a separate pipeline
Use appropriate pipeline
Leads to bus & register contention
Multiple branches lead to further pipelines being needed
Loop Buffer
Very fast memory
Maintained by fetch stage of pipeline
Check buffer before fetching from memory
Very good for small loops or jumps
c.f. cache
Used by CRAY-1
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Computer Organisation & Architecture – William Stallings
t1: MAR <- (PC)
t2: MBR <- (memory)
PC <- (PC) +1
t3: IR <- (MBR)
(tx = time unit/clock cycle)
t1: MAR <- (PC)
t2: MBR <- (memory)
t3: PC <- (PC) +1
IR <- (MBR)
MAR <- (IRaddress) - address field of IR
MBR <- (memory)
IRaddress <- (MBRaddress)
t1: MBR <-(PC)
t2: MAR <- save-address
PC <- routine-address
t3: memory <- (MBR)
t1: MAR <- (IRaddress)
t2: MBR <- (memory)
t3: R1 <- R1 + (MBR)
t1: MAR <- (IRaddress)
t2: MBR <- (memory)
t3: MBR <- (MBR) + 1
t4: memory <- (MBR)
if (MBR) == 0 then PC <- (PC) + 1
t1: MAR <- (IRaddress)
MBR <- (PC)
t2: PC <- (IRaddress)
memory <- (MBR)
t3: PC <- (PC) + 1
Basic Elements of Processor
ALU
Registers
Internal data paths
External data paths
Control Unit
Types of Micro-operation
Transfer data between registers
Transfer data from register to external
Transfer data from external to register
Perform arithmetic or logical ops