Simplified Thermal Stress Analysis

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Simplified Thermal Stress Analysis. Reference: Sergent, J., and Krum, A., Thermal Management Handbook for Electronic Assemblies , McGraw-Hill, New York, 1998. Chapter 7

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Simplified Thermal Stress Analysis

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Simplified Thermal Stress Analysis

Reference: Sergent, J., and Krum, A., Thermal Management Handbook for Electronic Assemblies, McGraw-Hill, New York, 1998. Chapter 7

Another helpful source: Vaynman, S., Mavoori, H., Chin, J., Fine, M.E., Moran, B, and Keer, L.M., Stress management and reliability assessment in electronic packaging, National Electronic Packaging and Production Conference--Proceedings of the Technical Program (West and East), v 3, 1996, p 1711-1726.

TCE

Problem: when one material is bonded to another with a much smaller temperature coefficient of expansion (TCE)

E=TCExDT

E=strain (length/length)

DT=temperature differential across sample

S=EY

S=stress (psi/in or Pa/m)

Y=modulus of elasticity (lb/in2 or Pa)

When total stress (S*max dimension of sample) exceeds tensile strength, cracks will form

Note that this analysis is simplified (Dr. Yee might not approve.)

Other thermal stress properties

The stress can cause displacement in the tangential direction.

Poisson’s ratio n=strain in tangential direction /strain in normal direction =eT/ eN

Shear modulus G=E/2/(1+n)

Die-Die Attach-Substrate

Two types of problems caused by TCE die<TCE substrate

• When the temperature is at equilibrium (component and die at same temp), stress greater than tensile stress of the die can occur. This happens when there is temperature cycling.
• Temperature differential exists, causing stress; may be caused by large thermal resistance of die attach
Total strain when both cases occur

E=(TCED-TCES)(TD-TA)+TCES(TD-TS)*

where D=die, S=substrate, A=ambient with power off

Experimental results will usually be somewhat less than this. However, note that there are other causes of stress, too, such as vibrations or material faults.

*Note again that this is simplified, so other sources may have a somewhat different version of this equation.

Stress due to processing

Processing temps are usually higher than operating temps, so they may cause the maximum stress. The stress maximum in this case is at the corners.

Stress concentrations

During manufacturing, small stress concentrations often occur – small cracks when a semiconductor die is sawed, small voids formed. When external stress is applied, these concentrations amplify the stress and may cause a fracture.

For an elliptical microcrack with major axis perpendicular to applied stress, max stress at crack tip

Force required to cause breakage

KIC=plain strain fracture toughness in psi-in1/2 or MPa-m1/2

Z=dimensionless constant, usually 1.2

a=microcrack length/2

To Minimize Stress
• Match TCE of component and substrate as much as possible
• Use an intermediate layer with a TCE in between that of the die and substrate; molybdenum often used (TCE between that of silicon and alumina)
• Choose materials that need the lowest processing temperatures – a large amount of stress is induced on the components as they cool from the processing temp
• Small voids in the bond distributed uniformly over the bond can help reduce stress. However, these voids will increase thermal resistance, increasing the junction temp, so this may not be a good thing. Also, watch out for stress concentrations, such as those caused by large voids.
• Use compliant bonding materials, such as soft solders and soft epoxies. Pb-Sn solder balls in BGA, or J-, gull-wing, and other types of leads in surface mounted devices are good. Again, note that a bonding material with a high thermal resistance will increase Tj.
• Reduce temperature fluctuations due to better thermal management.
To Minimize Stress, cont.
• Increase bond thickness – greater ability to flex when force applied; often used with solder joints