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New IBIS Cookbook 1.0 Introduction 1.1 Quick Overview of an IBIS File 1.2 Steps to creating an IBIS Model 2.0 Pre-Modeling Steps 2.1 Basic Decisions Model Version and Complexity Specification Model vs. Part Model Fast and Slow Corner Model Limits Inclusion of SSO Effects Mention of [Pin Mapping] (also [Model Selector]?) Brief comparison of AMS, standard IBIS, SPICE 2.2 Information Checklist Link to IBIS Quality Checklist 2.3 Tips For Component Buffer Grouping 3.0 Extracting the Data 3.1 Using Spice to IBIS (s2ibis) 3.1 Extracting I/V and Switching Data via Simulations 3.1.1 Extracting the I/V Data Simulation Setup Sweep Ranges Making Pullup and Power Clamp Sweeps Vcc Relative Clamp and ESD (Diode) Models ALL OTHER INFORMATION SHOWN THROUGH EXAMPLES 3.1.2 Extracting the Ramp Rate or V/T Waveform Data Extracting Data for the [Ramp] Keyword Extracting Data for the Rising and Falling Waveform Keywords Minimum Time Step 3.2.3 C_comp extraction 3.2.4 On-die termination 3.2.5 Overview of others – refer by section? 3.2 Automatic tool extraction and checklist Right ranges? Right timestep? Point selection? Right clamp counting? 3.3 Obtaining I/V and Switching Information via Lab Measurement Thanks to Lynne Green for updates
New IBIS Cookbook 4.0 Putting the Data Into an IBIS File 4.1 IBIS File Header Information 4.2 Component and Pin Information 4.3 The [Model] Keyword Parameter section Temperature and Voltage Keywords I/V data section Pulldown Ground Clamp Pullup Power Clamp Extrapolation Errors [Ramp] and Waveform Tables 4.4 Thresholds & Delay Vinh, Vinl, Vmeas, etc. [Model Spec] 4.5 External Package Models See ICM & Package Cookbook 4.6 Verifying the IBIS file See Quality and Accuracy Handbooks Parser notes: version makes a difference
New IBIS Cookbook 5.0 Examples of Common Model Types • CMOS totem-pole (input, output, I/O) • Concept: include only necessary I-V and V-t curves • I/O CMOS buffer with termination • Concept: clamp “counting” • I/O CMOS buffer with on-die termination • Concept: resistive, current, MOSFET, other termination model types • PECL/ECL • Concept: supply referencing • Multi-stage buffers • Concept: Using [Driver Schedule] • Differential buffers • Concept: Using [Diff Pin] • Pre-emphasis? Current-mode? • [Bus Hold] • Concept: Using [Submodel] Highlight only differences from generic steps shown earlier
New IBIS Cookbook 6.0 Validating the Model 7.0 Correlating the Data 8.0 Resources Simple updates
ICM Cookbook 1.0 Introduction 1.1 Quick Overview of an ICM File 1.1.1: Families 1.1.2: Models 1.1.3: Sections 2.0 Pre-Modeling Steps 2.1 Basic Decisions What cases within the family? S-parameters or RLGC? RLGC: Lumped or Distributed? RLGC: What frequency? Tree or Nodal? 2.2 Information Checklist Pictures? Lengths?
ICM Cookbook 4.0 Putting the Data into an ICM File 4.1 Header Information Version, File Revision, Name, Source, etc. 4.2 Family and Model Lists 4.2 Model Path Description Nodal Example Tree Path Example 4.3 Section Description and Options Organization of Matrices: Full, Sparse, Diagonal, Banded Matrices – R, L, C, G Derivation of Data Return Paths Bandwidth & Row S-parameters Touchstone primer
ICM Cookbook 5.0 Examples 5.1 Simple Connector (lumped) 5.2 Simple Cable (distributed) 5.3 BGA Package Model 6.0 Validation and Correlation VNA for S-parameters TDR for RLGC matrices 7.0 Resources