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Lecture 1 PowerPoint Presentation

Lecture 1

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Lecture 1

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  1. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Lecture 1 A review of microelectronics and an introduction to MOS technology

  2. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Why VLSI? • Introduction to integrated circuit technology • - Affected by electronics engineering technology • - Characterization of electronics at present-day • integration improved the design • reduces manufacturing cost

  3. Circuit Design Layout Fabrication Packaging Test Packaging Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut From design to market

  4. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Integrated circuit (IC) era Moore’s law : number of transistors per chip doubles every year

  5. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut IC technology scaling

  6. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Metal-oxide-semiconductor MOS = Metal Oxide Semiconductor In the past : Metal gate over Oxide insulation Present-day : polycrystalline silicon that we call “Poly” We use metal (aluminum) for interconnection wires on the surface of the chip.

  7. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI design process 1. Specification : Defined function, estimate cost Adder 2. Architecture : Large block Partition must be added in good design process if the circuit has complexity.

  8. A B R 1 R 2 R 3 Adder Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI design process 3. Logic :we can divide into 3 steps - Describe the behavior of circuit (Input, Output and behavior C = A + B - Describe the structure of circuit

  9. A B R 1 R 2 R 3 Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI design process - Detail design

  10. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI design process 4. Circuit Transistor : Speed, power 5. Layout : Now we are in those 2 process (process 4 and 5 )

  11. Structural Behavioral device Circuit Logic Architectural Physical Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Relation in design process Today’s view

  12. Custom Performance Std Cell Gate Array FPGA Cost Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Design Technology

  13. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI Technology 1. Schottky TTL (Transistor-transistor logic)

  14. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI Technology 2. ECL (Emitter coupled logic) NOR

  15. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI Technology 3. MOS (Metal Oxide semiconductor) NOR

  16. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI Technology 4. CMOS (Complementary MOS)

  17. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Transistor Structure

  18. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Manufacturing Steps

  19. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Photolithography Diffusion = High temperature Ion implementation = High velocity

  20. p-tub n-tub substrate Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Process Steps Doped substrate for n-type, p-type transistor

  21. gate oxide poly poly p-tub n-tub Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Process Steps (con’t) Pattern polysilicon before diffusion regions:

  22. poly poly p-tub n+ n+ n-tub p+ p+ Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Process Steps (con’t) Add diffusions, performing self-masking:

  23. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Process Steps (con’t) Start adding metal layers: metal 1 metal 1 vias poly poly p-tub n+ n+ n-tub p+ p+

  24. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut NMOS Process

  25. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Transistor Layout n-type (tubs may vary): L w

  26. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut N-well CMOS Process

  27. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut N-well CMOS Process (con’t)

  28. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut CMOS Transistor layout

  29. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut MOS Symbol nMOS nMOS pMOS enhancement depletion enhancement

  30. Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Discussion and Question