We buy good boards! ( Improve yield from design to production )

1. We buy good boards!(Improve yield from design to production) Christophe LOTZ christophe.lotz@aster-technologies.com ASTER Technologies BTW2009 IEEE 8th International Board Test Workshop

2. Content • Introduction • Yield improvements • Defect prevention vs. Defect detection • Test Coverage vs. Test Efficiency • Production model • Technologies convergence • Coverage Analysis • + Traceability & Quality tools • = Test Innovation • Conclusion

3. The world changes • Electronic design and production changes: • Functional complexity of electronic boards. • Staggering board density. • Outsourcing of board production. SMD, fine pitch, BGA, buried via Non-functional channels Block 3 We buy good boards Block 1 Block 2

4. Yield improvements • For a lot of people, Quality is costly. However, Non-Quality can be fatal. • When it is impossible to reduce the task, it is always possible to reuse the results for other purpose: i.e. Test for Designability, Production line optimization, Repair Cycle, Product life… • Combine Design Re-Use with Test Re-Use… Defect Prevention Defect Detection

5. Defect prevention • Design Flow • Electrical DfT rules checking from schematic. • Probe optimization from schematic. • Probe placement – Mechanical DfT rules. • DfM – Design for Manufacturing. • Coverage estimation • Inspection: AOI, AXI • Structural test: ICT,FPT,MDA,BST • Functional test: In-System test, Emulation… • Lack of automation/understanding between design and production center (The WALL)!

6. Defect Prevention • Manufacturing flow • Assembly machine • Feeder control/supply chain management, • Passive measurement during placement. • Traceability tools • Work In Process, • Box Building. • Repair station • CAD data, • Fault ticket, • Diagnosis. • Defect occurrence/re-occurrence Quality System mustbe able to reportthe amount of defects by partnumber

7. Material • X-Ray In-Circuit Solder (unpowered) • Insufficient • Excess • Cold Solder • Marginal Joints • Voids • Polarity (PCAP) • Dead Part • Bad Part • In-System Programming • Functionally Bad • Short/Open on PCB • Missing • Gross Shorts • Lifted Leads • Bent Leads • Extra Part • Bridging • Tombstone • Misaligned • Shorts • Open • Inverted • Wrong Part JTAG • At-speed memory tests • At-speed interconnect • Fault Insertion • Gate level diagnosis • Polarity • AOI (unpowered) Placement Defect Detection

8. Defect Detection

9. Design Manufacture Function Buy Materials (Supply chain) Place components Soldering Presence Orientation Defect Detection • One coin/two sides: Defect  Coverage • Drill-down on flows for more defect categories MPS, PTC, PPVS, PCOLA/SOQ PCOLA/SOQ/FAIM…

10. Test Coverage • Demonstration using an absurd example • Board - 4 components: 3 resistors, 1 BGA. • The 3 resistors are measured with very high accuracy. • No test on the BGA. • Is the board test score really 75%? 3 resistors / 4 components • We need something to weight the coverage… It must be credible, easy to update to reflect growing electronics complexity.

11. Df Cf Test Efficiency • For each category (MPS) of defects (D), we associate the corresponding coverage (C). • The test efficiency is based on a coverage balanced by the defects opportunities.  DM CM +  DP CP +  DS CS Effectiveness =  DM +  DP +  DS We need a better coverage where there are more defect opportunities!

12. Test Efficiency • Coverage • Material=0%, Placement=100%, Solder=100% • Massive production: • Material=2PPM, Placement=10PPM, Solder=10PPM • Test efficiency=90.9% • High mix: • Material=15PPM, Placement=10PPM, Solder=15PPM • Test efficiency=60.5% Everything is relative.

13. Defect universe • How to know your defect universe? • Average number: It is better than nothing as it make possible to differentiate a resistor from an IC. • www.ppm-monitoring.com • www.inemi.org • DPMO collected from the real production line • Placement defects andsoldering defects by package. • Material defects by partnumber. DPMO FPY SLIP Escape rate Fail Of Rate IPC Yield

14. Production model • Summarize the coveragein a limited set of numbers that will guide the test strategy choice. • The “Escape” is an effective way to measure the manufacturing quality. Good Products shipped First Pass Yield Escape Bad Pass Test Yield False reject Good Fail Products repaired Fall-Off Rate Bad

15. Technologies convergence • Design re-use is widely accepted throughout the electronics industry. • Design | test specification | test development | quality management are isolated in separated silos. Limited data exchange between silos. • It is time for test-reuse and technologies convergence. • It increases the test value. • It decreases the test cost.

16. Functional test • Functional coverage could be managed as described in BTW06 paper. • By Declaration Schematic and layout viewers used to simplify coverage declaration.

17. Functional test • By Inheritance Recognition of pre-analyzed modules with corresponding coverage Derivation and accumulation for the new design.

18. Functional test • For a complex board, it represents 3 to 5 days work to analyze the functional coverage if nothing has been prepared from design flow. • Benefits: • Get the overall coverage (inspection + structural + functional), • Identify overlapping (potential optimization), • Identify lack of coverage (Failure Mode and Effects Analysis). Tested?

19. Test Innovation • Functional test • Functional Test coverage tool used as functional test specification tool. • Define test strategy early in the design flow. • Identify unique test contribution. • Avoid un-required overlapping. • Functional Blocks recognition make possible to develop an Automatic Functional Test Generator. • Automate test development and coverage analysis in high-hierarchical design flow. • Integrate Designer knowledge for repair purpose.

20. Test Innovation • Test line • Test coverage results re-used in functional test repair station. • The Pass tests tell us which defects are not on the board. • The Fail tests tell us which defects could be on the board. • Combined with historical data in order to guide diagnosis to the most probable source of defect. Coverage Database

21. Test Innovation • Dynamic test program optimization driven by Quality management tool. • When the test is the bottleneck of the production: • The Quality Management system is collecting DMPO in real time. • Defect profile is used to tune the assembly line. • According to the defect profile, the test program is dynamically optimized. No need to maintain test on defect thatno longer occurs !

22. Conclusion • From design, during production and in a more general way, through the whole product life cycle, coverage estimation permits the test process to be optimized. • By deploying various testers in the best order, at the best time, with controlled levels of redundancy, costs can be reduced and quality levels raised. • The economic challenges are critical: the tools to meet them are available.