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Scalable Hierarchical Yield Control System For Semiconductor Manufacturing A Feasibility Study. Bill Martin, Jill Card, Wai Chan, Joyce Hyde, Yi-Min Lai IBEX Process Technology A Division of Neumath, Inc., Haverhill, MA John Doxsey, Paul Fearon National Semiconductor, S. Portland ME.

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scalable hierarchical yield control system for semiconductor manufacturing a feasibility study
Scalable Hierarchical Yield Control System For Semiconductor ManufacturingA Feasibility Study

Bill Martin, Jill Card, Wai Chan,

Joyce Hyde, Yi-Min Lai

IBEX Process Technology

A Division of Neumath, Inc., Haverhill, MA

John Doxsey, Paul Fearon

National Semiconductor, S. Portland ME

outline
Outline
  • Overview
  • Design Approach
  • Feasibility Study Data Collection
  • Feasibility Study Results
  • Conclusions/Next Steps
overview
Overview
  • Adaptive Hierarchical Design

Works in conjunction with local tool controllers such as Neumath's Dynamic Neural Controller (DNC) product.

  • Optimises overall yield and end-of-line performance characteristics
  • Works with partial data to permit adaptive

adjustment of downstream operation

quality targets to minimize scrap

yield controller hierarchical design
Yield Controller Hierarchical Design

Y

I

E

L

D

CONTROLLER

Optimize Metrology Targets across Products and Process Steps

X

X

DNC

Deposition

DNC

CMP

DNC

Photo

DNC

Etch

Dep

Quality

Metrics

Photo

Quality

Metrics

Etch

Quality

Metrics

CMP

Quality

Metrics

comprehensive software tool development
Comprehensive Software Tool Development
  • Yield Control Layer
    • Accurate prediction of End Of Line (EOL) metrics
    • Automatic metrology target and spec adjustment
  • Tool Control Layer
    • Accurate prediction of post-process metrology and action advisory (DNCs, DNCe)
    • Automated recipe parameter target and spec adjustment
additional benefits
Additional Benefits
  • Full use of all in-situ and ex-situ sensors across products.
  • Automatic optimization of recipe parameters and metrology specifications. No setup required.
  • Determination of quantified sensor importance
  • Pinpointing troubled tools
    • Quantified impact on EOL metrics and Yield
    • W2W Detection, Diagnosis, and Fix.
feasibility study
Feasibility Study
  • Goal: demonstrate that accurate predictive models can be built
    • Using step-wise quality measurements as input
    • Predict end-of-line electrical parameters plus final product yield
    • Uses Neural Network-based predictive engine
      • Adaptive
      • Flexible
      • Accurate
feasibility study data collection
Feasibility Study Data Collection
  • National Semiconductor, South Portland, ME
  • 0.18μm CMOS technology
    • Covering 2 different product designs
    • Data from 381 wafers, 33 lots
  • Data Collected:
    • Quality measurements from CMP, Photo, Etch
      • All metal layers (31 operations in total)
    • 15 End of Line electrical parameters
    • Final Yield (% good die)
end of line parameters modelled
End of Line Parameters Modelled
  • Metal 1,2,3 Bridging
  • N-Type Silicide Bridging
  • P-Type Silicide Bridging
  • Via 1,2,3 Contact Resistance
  • Metal 1,2,3,4 Continuity Resistance
  • Poly Continuity Resistance
  • Product Yield
measurements used as model inputs
Measurements Used As Model Inputs
  • Metal layers
    • Photoresist top and bottom CD
    • Post-etch top and bottom CD
    • Defect density
  • Dielectric layers
    • Pre and post CMP thickness and non-uniformity
    • Pre and post CMP ILD thickness
  • Via Layers
    • Photoresist bottom CD (dense and isolated structures)
    • Post-etch bottom CD (dense and isolated structures)
data preparation i
Data Preparation I
  • Quality metrics measured on a sample basis after each processing step.
    • Not always on the same wafers within the lot
    • Results is a sparse data set, insufficient for model training.
  • Algorithm to supply estimates for the missing measurements:
    • Use lot-based average if available.
    • Use time-based moving average otherwise.
data preparation ii
Data Preparation II
  • Merge quality metric data from all processing steps with the end-of-line electrical parameters and final yield
    • Using lot number and wafer identifier
  • Divide data into two subsets
    • Training data (70% of total)
      • Divided into Train and Test
    • Validation data (remaining 30%)
      • Never used during Neural Network training
      • Helps avoid over-fitting
neural model training
Neural Model Training
  • Use one Neural Network each for:
    • End of Line electrical parameters
    • Final Yield
  • Minimal Network acceptance criteria:
    • Root Mean Square Error (RMSE) must be less than standard deviation of the observed data
      • Better than “guessing the mean”
    • Model must generalize:
      • RMSE (validation data) < (1+α) RMSE (training data)
    • Acceptable accuracy measure.
neumath accuracy measure
NeuMath Accuracy Measure
  • Each EOL parameter assigned a target and limits in accordance with product specification.
    • Divide limits range into 7 regions
    • Accuracy defined as the fraction of time the observed and predicted fall into the same sub-region.
  • Since accuracy is tied to the spec limits:
    • Remains consistent with current decision-making criteria
    • The fraction of time the decision would be the same using the prediction as it would be using the observed value.
results overview
Results Overview
  • Models for 14 of the 16 End Of Line measurements converged :
    • Including final yield.
    • Provide an average accuracy of 90%!!
    • Comparison of RMS Errors of validation and training sets shows very good model generalization.
      • Critical for model-based decision-making.
conclusions next steps
Conclusions / Next Steps
  • Feasibility study a success
    • Excellent Model performance (90% accuracy)
    • Optimization shows possible EOL improvements of up to 22%
  • Next Steps
    • Repeat on additional data sets from our partner and additional partners
    • Full beta trial early 2005
    • Software product release Q2 2005