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Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design

Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design. Course and contest Results of Phase 4 Sebastian Kruse. Design improvements. Mix of ripple carry and carry skip adders Bit size between 7 and 9 12 adders overall Some fixed bits. New optimizations for Synopsys.

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Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design

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  1. SpezielleAnwendungen des VLSI – EntwurfsApplied VLSI design Course and contest Results of Phase 4 Sebastian Kruse

  2. Design improvements • Mix of ripple carry and carry skip adders • Bit size between 7 and 9 • 12 adders overall • Some fixed bits

  3. New optimizations for Synopsys • Voltage 1,0 V • 629 MHz • Settings • set target_library $COREHVTtyp10V • set_cost_priority{max_delay} • set_max_dynamic_power2 mW • set_max_leakage_power16 nW • compile_ultra-retime

  4. Differences in Encounter to guide • Floorplanning • Set aspect ratio of the core size (h/w) to 0.5 • Set core utilization to 90% • Set core to I/O boundary spacing of 10µm • Powerplanning • Power rings with calculated spacing (update button) • Routing • Nano route uses the “optimize wire”-feature

  5. Timing Analysis • No failing paths • Only few paths with higher slack • Calculated frequency of 554 MHz, but higher frequency is possible

  6. Final results

  7. Layout with Pads

  8. Thank you for your attention!

  9. Alternative Design • Use comparator of two register values (only 6 bits) • Only the response up to 25 MHz needs to fit • Realize with NOR-Gates • Voltage 1,3 V • Results for Synopsys: • Results for Encounter:

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