Presenter. MaxAcademy Lecture Series – V1.0, September 2011. Number Representations and Arithmetic. Lecture Overview. Why we care Number representation Number types in MaxCompiler Rounding Arithmetic styles Error and other numerics issues. Why we care.
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 Integer: unsigned, two’s complement
 Floating Point
Unsigned
Representations
0000
1111
0001
0
15
1
1110
0
0010
0
+1
14
2
1
+2
1101
0011
13
3
+3
2
Signed Values
(1’s Complement)
4
0100
+4
3
12

1100
+
+5
4
5
0101
11
+6
5
1011
6
+7
6
0110
7
10
7
1010
9
8
0111
1001
1000
Unsigned
Representations
0000
1111
0001
0
15
1
1110
0
0010
1
+1
14
2
2
+2
1101
0011
13
3
+3
3
Signed Values
(2’s Complement)
4
0100
+4
4
12

1100
+
+5
5
5
0101
11
+6
6
1011
6
+7
7
0110
8
10
7
1010
9
8
0111
1001
1000
Most significant bit (msb) is the sign bit.
Advantages: symmetry around 0, easy access to x, simple overflow detection
Disadvantages: complexity of add/sub.
Represent x by inverting each bit. Overflow=Sign_Carry_In ^ Sign_Carry_Cout
Advantages: fast negation
Disadvantages: add/sub correction: carryout of sign bit is added to lsb
Represent x by inverting each bit and adding ‘1’. Overflow=same as One’s c.
Advantages: fast add/sub
Disadvantages: magnitude computation requires full addition
Digit weights:
(unsigned)
I bits
F bits
+
=
=
// Create an input of type t
HWVario.input(String name, HWType t);
// Create an HWVar of type t with constant value
HWVar constant.var(HWType t, double value);
// Cast HWVary to type t
HWVar x = y.cast(HWType t);
HWType t = hwFloat(intexponent_bits, intmantissa_bits);
Including the sign bit
Why hwFloat(7,17)…?
HWType t = hwFix(intinteger_bits, intfraction_bits, SignModesm);
class MyKernel extends Kernel {
public MyKernel(KernelParameters k, HWTypet_in, HWTypet_out) {
super(k);
HWVar p = io.input(“p”, hwFloat(8,24));
HWVar q = io.input(“q”, t_in);
HWVar r = p * p;
HWVar s = r + q.cast(r.getType());
io.output(“s”, s.cast(t_out), t_out);
}
}
HWVar z;
...
optimization.pushRoundingMode(RoundingMode.TRUNCATE);
z = z.cast(smaller_type);
optimization.popRoundingMode();
Parallel
DigitSerial
Sequential
 loop x times
Pipelined
 loop unrolled
Combinational
 loop unrolled
 no registers
 logic minimization
HWVar x, y, z; // floating point numbers
...
z = x * y; // fully pipelined
optimization.pushPipeliningFactor(0.5);
z += x; // half pipelined – lower latency
optimization.pushPipeliningFactor(0.0);
z += y; // no pipelining
optimization.popPipeliningFactor();
optimization.popPipeliningFactor();
z = z * 2; // fully pipelined again
Approximate cost models
I = Integer bits, F = Fraction bits. E = Exponent bits, M = Mantissa Bits
hwFix(32, 0, UNSIGNED)
hwFix(32, 0, TWOSCOMPLEMENT)
hwFix(28, 4, UNSIGNED)
hwFix(32, 4, UNSIGNED)
hwFloat(11, 53)
hwFloat(8, 24)
hwFloat(8, 32)
hwFloat(8, 33)