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Chapter Three 80x86 Microprocessor 80x86 微处理器 （ 3 ）

Chapter Three 80x86 Microprocessor 80x86 微处理器 （ 3 ）. 3 ． 20 位地址加法器 8086/8088CPU 在对存储单元进行访问以读取指令或读 / 写操作数时，必须在地址总线上提供 20 位的地址信息，以便选中对应的存储单元。那么， CPU 是如何产生 20 位地址的呢？ CPU 提供的用来对存储单元进行访问的 20 位地址是由 BIU 中的地址加法器产生的。. 存储器中每个存储单元的地址可有以下两种表示方式：

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Chapter Three 80x86 Microprocessor 80x86 微处理器 （ 3 ）

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  1. Chapter Three80x86 Microprocessor80x86微处理器（3） 2014年12月2日1

  2. 3．20位地址加法器 8086/8088CPU在对存储单元进行访问以读取指令或读/写操作数时，必须在地址总线上提供20位的地址信息，以便选中对应的存储单元。那么，CPU是如何产生20位地址的呢？ CPU提供的用来对存储单元进行访问的20位地址是由BIU中的地址加法器产生的。 2014年12月2日2

  3. 存储器中每个存储单元的地址可有以下两种表示方式：存储器中每个存储单元的地址可有以下两种表示方式： 逻辑地址：其表达形式为“段地址：段内偏移地址”。段内偏移地址又称为“有效地址EA(Effective Address)。在读指令时，段地址由代码段寄存器CS提供，当前要读取指令在代码段中的偏移地址由指令指针寄存器IP提供；在读取或存储操作数时，根据具体操作，段地址由DS、ES或SS提供，段内偏移地址由指令给出。 2014年12月2日3

  4. 物理地址：CPU与存储器进行数据交换时在地址总线上提供的20位地址信息称为物理地址。物理地址的形成过程如图3.3所示。当由IP提供或由EU根据指令所提供寻址方式计算出寻址单元的16位段内偏移地址后，把该偏移地址和段寄存器内容左移四位后（相当于乘以10H）得到的段基址（段内第一个存储单元的物理地址）同时送到BIU中的地址加法器，形成一个20位的物理地址，从而实现对存储单元的访问。由逻辑地址求物理地址的公式为：物理地址=段地址10H+段内偏移地址物理地址：CPU与存储器进行数据交换时在地址总线上提供的20位地址信息称为物理地址。物理地址的形成过程如图3.3所示。当由IP提供或由EU根据指令所提供寻址方式计算出寻址单元的16位段内偏移地址后，把该偏移地址和段寄存器内容左移四位后（相当于乘以10H）得到的段基址（段内第一个存储单元的物理地址）同时送到BIU中的地址加法器，形成一个20位的物理地址，从而实现对存储单元的访问。由逻辑地址求物理地址的公式为：物理地址=段地址10H+段内偏移地址 如假设当前(CS)=20A8H，(IP)=2008H，那么，下一条从内存中读取的指令所在存储单元的物理地址为：20A8H10H+ 2008H=22A88H。 2014年12月2日4

  5. 图3.3 物理地址的形成 2014年12月2日5

  6. 4. 指令队列缓冲器 8086的指令队列有6个字节，8088的指令队列有4个字节。对8086而言，当指令队列出现2个空字节，对8088而言，指令队列出现1个空字节时，BIU就自动执行一次取指令周期，将下一条要执行的指令从内存单元读入指令队列。它们采用“先进先出”原则，按顺序存放，并按顺序取到EU中去执行。 指令队列的引入使得EU和BIU可并行工作，即BIU在读指令时，并不影响EU单元执行指令，EU单元可以连续不断地直接从指令队列中取到要执行的指令代码，从而减少了CPU为取指令而等待的时间，提高了CPU的利用率，加快了整机的运行速度。 2014年12月2日6

  7. 二．执行单元EU 执行单元EU不与系统外部直接相连，它的功能只是负责执行指令。执行的指令从BIU的指令队列缓冲器中直接得到，执行指令时若需要从存储器或I/O端口读写操作数时，由EU向BIU发出请求，再由BIU对存储器或I/O端口进行访问。 2014年12月2日7

  8. 执行单元EU由下列部件组成： 1.16位算术逻辑单元(ALU)：进行算术和逻辑运算。 2.16位标志寄存器FLAGS：存放CPU运算的状态和控制标志。3.数据暂存寄存器：暂存参加运算的数据 4.通用寄存器：包括4个16位数据寄存器AX、BX、CX、DX和 4个16位指针与变址寄存器SP、BP与SI、DI。 5.EU控制电路：它是控制、定时与状态逻辑电路，接收从BIU中指令队列取来的指令，经过指令译码形成各种定时控制信号，对EU的各个部件实现特定的定时操作。 2014年12月2日8

  9. The EU contains the following 16-bit registers: • AX - the Accumulator • BX - the Base Register • CX - the Count Register • DX - the Data Register • SP - the Stack Pointer \defaults to stack segment • BP - the Base Pointer / • SI - the Source Index Register • DI - the Destination Register • These are referred to as general-purpose registers, although, as seen by • their names, they often have a special-pupose use for some instructions. • The AX, BX, CX, and DX registers can be considers as two 8-bit registers, a • High byte and a Low byte. This allows byte operations and compatibility with • the previous generation of 8-bit processors, the 8080 and 8085. 8085 source • code could be translated in 8086 code and assembled. The 8-bit registers are: • AX --> AH,AL • BX --> BH,BL • CX --> CH,CL • DX --> DH,DL I-11 2014年12月2日9

  10. The EU contains the following 16-bit registers: • AX - the Accumulator • BX - the Base Register • CX - the Count Register • DX - the Data Register • SP - the Stack Pointer \defaults to stack segment • BP - the Base Pointer / • SI - the Source Index Register • DI - the Destination Register • These are referred to as general-purpose registers, although, as seen by • their names, they often have a special-pupose use for some instructions. • The AX, BX, CX, and DX registers can be considers as two 8-bit registers, a • High byte and a Low byte. This allows byte operations and compatibility with • the previous generation of 8-bit processors, the 8080 and 8085. 8085 source • code could be translated in 8086 code and assembled. The 8-bit registers are: • AX --> AH,AL • BX --> BH,BL • CX --> CH,CL • DX --> DH,DL I-11 2014年12月2日10

  11. The EU also contains the Flag Register which is a collection of condition • bits and control bits. The condition bits are set or cleared by the execution • of an instruction. The control bits are set by instructions to control some • operation of the CPU. • Bit 0 - CF Carry Flag - Set by carry out of msb • Bit 2 - PF Parity Flag - Set if result has even parity • Bit 4 - AF Auxiliary Flag - for BCD arithmetic • Bit 6 - ZF Zero Flag - Set if result is zero • Bit 7 - SF Sign Flag = msb of result • Bit 8 - TF Single Step Trap Flag • Bit 9 - IF Interrupt Enable Flag • Bit 10 - DF String Instruction Direction Flag • Bit 11 - OF Overflow Flag • Bits 1, 3, 5, 12-15 are undefined. • Bits 0-7 are 8085 compatible. I-12 2014年12月2日11

  12. 3.2.2 8086/8088寄存器结构 通用寄存器8个 （数据寄存器4个） （地址指针寄存器2个） （变址寄存器2个） 共14个寄存器 段寄存器4个 控制寄存器2个 2014年12月2日12

  13. The 80x86 CPUs:A Programmer’s View • The most visible component of the CPU is the register set. Like our hypothetical processors, the 80x86 chips have a set of on-board registers. The register set for each processor in the 80x86 family is a superset of those in the preceding CPUs. The best place to start is with the register set for the 8088, 8086, 80188, and 80186 since these four processors have the same registers. In the discussion which follows, the term “8086” will imply any of these four CPUs. 2014年12月2日13

  14. The 80x86 CPUs: A Programmer’s View • Intel’s designers have classified the registers on the 8086 into three categories: general purpose registers, segment registers, and miscellaneous registers. • The general purpose registers are those which may appear as operands of the arithmetic, logical, and related instructions. Although these registers are “general purpose”, every one has its own special purpose. Intel uses the term “general purpose” loosely. • The 8086 uses the segment registers to access blocks of memory called, surprisingly enough, segments. • The final class of 8086 registers are the miscellaneous registers. There are two special registers in this group which we’ll discuss shortly. 2014年12月2日14

  15. 8086 General Purpose Registers • There are eight 16 bit general purpose registers on the 8086: ax, bx, cx, dx, si, di, bp, and sp. While you can use many of these registers interchangeably in a computation, many instructions work more efficiently or absolutely require a specific register from this group. So much for general purpose. 2014年12月2日15

  16. 8086 General Purpose Registers • The ax register (Accumulator) is where most arithmetic and logical computations take place. Although you can do most arithmetic and logical operations in other registers, it is often more efficient to use the ax register for such computations. • The bx register (Base) has some special purposes as well. It is commonly used to hold indirect addresses. • The cx register (Count), as its name implies, counts things. You often use it to count off the number of iterations in a loop or specify the number of characters in a string. • The dx register (Data) has two special purposes: it holds the overflow from certain arithmetic operations, and it holds I/O addresses when accessing data on the 80x86 I/O bus. 2014年12月2日16

  17. 8086 General Purpose Registers • The si and di registers (Source Indexand Destination Index) have some special purposes as well. You may use these registers as pointers (much like the bx register) to indirectly access memory. You’ll also use these registers with the 8086 string instructions when processing character strings. 2014年12月2日17

  18. 8086 General Purpose Registers • The bp register (Base Pointer) is similar to the bx register. You’ll generally use this register to access parameters and local variables in a procedure. • The sp register (Stack Pointer) has a very special purpose – it maintains the program stack. Normally, you would not use this register for arithmetic computations. The proper operation of most programs depends upon the careful use of this register. 2014年12月2日18

  19. 8086 General Purpose Registers • Besides the eight 16 bit registers, the 8086 CPUs also have eight 8 bit registers. Intel calls these registers al, ah , bl, bh, cl, ch, dl, and dh. The eight bit registers are not independent. al stands for “ax ’s L.O. byte.” ah stands for “ax’s H.O. byte.” The names of the other eight bit registers mean the same thing with respect to bx, cx, and dx. • The following Figure shows the general purpose register set. 2014年12月2日19

  20. 8086 General Purpose Registers 2014年12月2日20

  21. 8086 General Purpose Registers • Note that the eight bit registers do not form an independent register set. Modifying al will change the value of ax ; so will modifying ah. The value of al exactly corresponds to bits zero through seven of ax . The value of ah corresponds to bits eight through fifteen of ax . Therefore any modification to al or ah will modify the value of ax. Likewise, modifying ax will change both al and ah. Note, however, that changing al will not affect the value of ah, and vice versa. This statement applies to bx/bl/bh, cx/cl/ch, and dx/dl/dh as well. 2014年12月2日21

  22. 8086 General Purpose Registers • The si, di, bp, and sp registers are only 16 bits. • There is no way to directly access the individual bytes of these registers as you can the low and high order bytes of ax, bx, cx, and dx. 2014年12月2日22

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