ECE 331 – Digital System Design

1. Transistor Technologies, and Realizing Logic Gates using CMOS Circuits (Lecture #23) ECE 331 – Digital System Design

2. ECE 331 - Digital System Design Two transistor technologies: 1. Transistor-Transistor Logic (TTL) 2. Metal Oxide Semiconductor (MOS) Transistor Technologies

3. ECE 331 - Digital System Design TTL Technology • TTL = Transistor-transistor Logic • Dominant technology prior to the emergence of CMOS technology. • Not as suitable for large-scale integration as CMOS technology. • Largely obsolete for new designs. • Good for labs and educational use because it is more robust than CMOS.

4. ECE 331 - Digital System Design TTL Technology • Bipolar Junction Transistor (BJT) • Base – controls current flow in transistor • Collector – current flow enters transistor • Emitter – current flow exits transistor • npn BJT • Collector, Emitter: n-type semiconductor • Base: p-type semiconductor • pnp BJT • Collector, Emitter: p-type semiconductor • Base: n-type semiconductor

5. ECE 331 - Digital System Design MOS Technology • CMOS • Complementary Metal Oxide Semiconductor • NMOS • N-channel MOSFET • PMOS • P-channel MOSFET • MOSFET • Metal Oxide Semiconductor Field Effect Transistor

6. ECE 331 - Digital System Design x = "low" x = "high" (a) A simple switch controlled by the input x Gate Source Drain Substrate (Body) (b) NMOS transistor V G V V S D (c) Simplified symbol for an NMOS transistor NMOS Transistor

7. ECE 331 - Digital System Design NMOS Transistor • Four-terminal device • Simplified three-terminal representation • Conducting channel is N-type material • Drain pulled high (connected to supply voltage) in digital circuits • Source pulled low (connected to ground) in digital circuits

8. ECE 331 - Digital System Design NMOS Transistor • Gate-to-Source Voltage (VGS) • Controls the drain current (iD) via an electric field • Oxide (silicon dioxide) insulates the gate from the drain and the source • iG ~= 0 Amps • iD ~= iS • Low power

9. ECE 331 - Digital System Design NMOS Transistor • Operates as a binary switch in digital circuits • VG = 0V (VS = GND = 0V) • VGS ~= 0V • “looks like” an open switch (in the cutoff region; “off”) • ID = IS = 0A • VG = VDD (VS = GND = 0V) • VGS ~= VDD • “looks like” a closed switch (in the saturated region; “on”)

10. ECE 331 - Digital System Design x = "high" x = "low" (a) A switch with the opposite behavior of the NMOS transistor Gate Drain Source V DD Substrate (Body) (b) PMOS transistor V G V V S D (c) Simplified symbol for a PMOS transistor PMOS Transistor

11. ECE 331 - Digital System Design PMOS Transistor • Four-terminal device • Three-terminal simplified representation • Conducting channel is P-type material • Drain pulled low (connected to ground) in digital circuits • Source pulled high (connected to supply voltage) in digital circuits

12. ECE 331 - Digital System Design PMOS Transistor • Gate-to-Source Voltage (VGS) • Controls the drain current (iD) via an electric field • Oxide (silicon dioxide) insulates the gate from the drain and the source • iG ~= 0 Amps • iD ~= iS • Low power

13. ECE 331 - Digital System Design PMOS Transistor • Operates as an binary switch in digital circuits • VG = 0V (VS = VDD = Supply Voltage) • VGS ~= -VDD (VSG ~= VDD) • “looks like” an closed switch (in the saturated region; “on”) • VG = VDD (VS = VDD = Supply Voltage) • VGS ~= 0V (VSG = 0V) • “looks like” a open switch (in the cutoff region; “off”) • ID = IS = 0A

14. ECE 331 - Digital System Design V V = 0 V V D D D V G V = 0 V S Closed switch Open switch when V = V when V = 0 V G DD G (a) NMOS transistor V = V V V S DD DD DD V G V V V = V D D D DD Open switch Closed switch when V = V when V = 0 V G DD G (b) PMOS transistor NMOS and PMOS Transistors

15. ECE 331 - Digital System Design PMOS transistors NMOS transistors CMOS Logic Circuit

16. ECE 331 - Digital System Design Voltages are used to represent Logic values in CMOS (and TTL) circuits: Logic 1 = VDD Logic 0 = GND Voltage Levels in CMOS Circuits

17. ECE 331 - Digital System Design Voltage Ranges in CMOS Circuits

18. ECE 331 - Digital System Design CMOS Logic • Beneficial to use NMOS and PMOS in same design • No steady state drain (or gate) current • Low power dissipation • Configuration of NMOS and PMOS transistors • For Output of CMOS circuit = Logic 0 • PDN (NMOS transistors) ON • PUN (PMOS transistors) OFF • For Output of CMOS circuit = Logic 1 • PDN (NMOS transistors) OFF • PUN (PMOS transistors) ON

19. ECE 331 - Digital System Design V DD T T x f T 1 2 1 0 on off 1 V V x f 1 off on 0 T 2 (b) Truth table and transistor states (a) Circuit CMOS Circuit: Inverter (NOT)

20. ECE 331 - Digital System Design CMOS Circuit: NAND Gate

21. ECE 331 - Digital System Design CMOS Circuit: NOR Gate

22. ECE 331 - Digital System Design CMOS Circuit: AND Gate NAND Gate Inverter

23. ECE 331 - Digital System Design CMOS Circuit: OR Gate

24. ECE 331 - Digital System Design Analysis CMOS Circuits

25. ECE 331 - Digital System Design The functional behavior of a CMOS circuit can be determined by analyzing the behavior of the individual PMOS and NMOS transistors, and, thus, the behavior of the PUN and PDN. CMOS Circuits: Analysis

26. ECE 331 - Digital System Design CMOS Circuits: Analysis (Steps) • Determine the state of each transistor for each input combination. • Determine the output of the CMOS circuit for each input combination. • Derive the corresponding Truth Table • Determine the Boolean Expression that defines the behavior of the CMOS circuit.

27. ECE 331 - Digital System Design Example #1: Analyze the following CMOS circuit to determine the logic function that it implements. CMOS Circuits: Analysis

28. ECE 331 - Digital System Design CMOS Circuit: Analysis (Ex. #1)

29. ECE 331 - Digital System Design Example #2: Analyze the following CMOS circuit to determine the logic function that it implements. CMOS Circuits: Analysis

30. ECE 331 - Digital System Design CMOS Circuit: Analysis (Ex. #2)