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The Verification of UniCore-II Microprocessor

The Verification of UniCore-II Microprocessor. Sun Hanxin Peking University Microprocessor R&D Center. Outline. Introduction to UniCore-II microprocessor Simulation-based verification methodology Bug driven activity Conclusions and future work. Pkunity-3 Architecture.

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The Verification of UniCore-II Microprocessor

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  1. The Verification of UniCore-II Microprocessor Sun Hanxin Peking University Microprocessor R&D Center

  2. Outline • Introduction to UniCore-II microprocessor • Simulation-based verification methodology • Bug driven activity • Conclusions and future work

  3. Pkunity-3 Architecture

  4. UniCore Frequency: 600MHz 32-bit harvard-architecture RISC CPU UniCore32 instruction set compatible Add conditional mov & BLX instructions 8-stage instruction pipeline Dynamic prediction policy: G-share Pipelined I&D Cache Two-level TLB UniCore-II Microprocessor

  5. Design Verification Problem • Functional verification is widely recognized as the bottleneck of hardware design cycle: • The ever-growing demand for processor performance • The dramatically increase in hardware complexity • Low tolerance for bugs on finished product • Time-to-market pressure

  6. Solution to Verification Problem • Different Tests, Different Methods: • Formal Verification: • Small block test • Simulation: • Directed test • Constrained-random test • Simulation Acceleration: • Regression test • FPGA Prototyping: • BIOS, Linux kernel, Application test

  7. Simulation-based Verification • Simulation metric • Checking scheme • Test generation

  8. Simulation Metric • Code coverage: • line coverage • toggle coverage • FSM coverage • condition coverage • Functional coverage: • pipelined instruction state coverage • AHB bus transaction coverage • Assertion coverage

  9. Checking Scheme • Self-check assembly code • OpenVera assertion • Golden reference model comparison

  10. SystemC in the design flow: Find out problems of documented specification Evaluate design early in the design cycle Golden reference model of RTL design verification Checking Scheme

  11. Test Program Generation • The key issue of processor verification: • Test vector efficiency • Verification time • Quality of product • Some examples of processor verification: • Intel Pentium-4 verification • Alpha21164 verification • IBM Genesys, GenesysPro test generator

  12. Test Program Generation UniGener: UniCore-II test program generator

  13. Bug Driven Activity Bug driven activity of UniCore-II processor verification: UniCore-II Bug trends:

  14. Bug Analysis: Example

  15. Conclusions • Different tests, different methods. • Metric-checking-generation triangle • Processor verification needs an efficient test program generator • UniCore-II test program generator: UniGener • Bug driven activity

  16. Future Work • Introduce more useful concept on coverage of processor verification • Introduce more algorithm to UniGener We’re glad to discuss with you about UniGener

  17. Thank you

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