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Chapter 11 Instruction Sets: Addressing Modes and Formats

Chapter 11 Instruction Sets: Addressing Modes and Formats. HW: 11.4, 5, 13, 16 (Due 11/15). Addressing Modes. Addressing Modes. Memory references?. Addressing Modes. Memory references? Displacement Addressing: Relative or PC-relative Base-Register (segmentation) Indexing.

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Chapter 11 Instruction Sets: Addressing Modes and Formats

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  1. Chapter 11Instruction Sets: Addressing Modes and Formats HW: 11.4, 5, 13, 16 (Due 11/15)

  2. Addressing Modes

  3. Addressing Modes Memory references?

  4. Addressing Modes Memory references? Displacement Addressing: Relative or PC-relative Base-Register (segmentation) Indexing

  5. Pentium Addressing Modes

  6. Pentium Addressing Modes • Virtual or effective address is offset into segment • Starting address plus offset gives linear address • This goes through page translation if paging enabled

  7. Pentium Address Translation

  8. Pentium Addressing Mode Calculation

  9. Pentium Instruction Format

  10. PowerPC Addressing Modes • Load/store architecture • Indirect • Instruction includes 16 bit displacement to be added to base register (may be GP register) • Can replace base register content with new address • Indirect indexed • Instruction references base register and index register (both may be GP) • EA is sum of contents • Branch address • Absolute • Relative • Indirect • Arithmetic • Operands in registers or part of instruction • Floating point is register only

  11. Power PC Addressing Modes

  12. PowerPC Memory Operand Addressing Modes

  13. PowerPC Instruction Formats (1)

  14. PowerPC Instruction Formats (2)

  15. PDP-8 Instruction Format

  16. PDP-10 Instruction Format

  17. PDP-11 Instruction Format

  18. VAX Instruction Examples

  19. z

  20. z

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