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Computer Systems & Networks. I – Computer Systems Roger Webb (13DJ01) R.Webb@surrey.ac.uk. Syllabus. Introduction Computer Interconnection Structures Internal & External Memory Input & Output Operating Systems – part 1 Operating Systems – part 2 Computer Arithmetic – part 1

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Computer Systems & Networks


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    1. Computer Systems & Networks I – Computer Systems Roger Webb (13DJ01) R.Webb@surrey.ac.uk

    2. Syllabus • Introduction • Computer Interconnection Structures • Internal & External Memory • Input & Output • Operating Systems – part 1 • Operating Systems – part 2 • Computer Arithmetic – part 1 • Computer Arithmetic – part 2 • Instruction Sets: Characteristics & Function • Instruction Sets: Addressing Modes & Formats • CPU Structure & Function – part 1 • CPU Structure & Function – part 2 • Control Unit Operation .....................................................................chapter 2 .....................chapter 3 ........................................chapter 4 ................................................................chapter 6 ........................................chapter 7 .....................................chapter 8 ........chapter 9 .chapter 10 .........................chapter 11 ..............................................chapter 14 Computer Organisation & Architecture – William Stallings

    3. Introduction Early Computing Devices: (8000BC – 1600) 8000 BC Tally Bones/Sticks History of Computing: Computer:- a person who performs computations 5000 BC – Sumeria – Abaq (writing in dust) 3000 BC – China - the Abacus 800 BC – Abax arrives in Europe 1594 – John Napier natural logs

    4. Introduction History of Computing: Mechanical Computers: (1600-1800) 1615 – Slide Rule – William Oughtred 1617 – Napier’s Bones 1642 – Pascaline - Blaise Pascal 1804 – Punch Card Loom – Jacquard

    5. Introduction History of Computing: Electro-Mechanical Computers: (1800-1890) 1833 – Difference Engine – Babbage - to make accurate trig and log tables - never actually finished – “of no use to science” 1842 – Analytic Engine (programmable version) (1991 Science Museum spent £400,000 to build working model of simplified Difference Engine – 3tons, 6’ high and 10’ long) 1840 – Lady Ada Lovelace – 1st programmer - suggested that Babbage’s engine could be programmed using punch cards

    6. Introduction History of Computing: Mechanical Computers: (1890-1920) 1890 – Holerith’s Tabulating Machine - punch card data for sorting census data 1906 – Lee De Forest invents vacuum tube (triode) 1911 – Holerith founds Tabulating Machines Company 1924 – Renamed International Business Machines Corporation (IBM) by Thomas J. Watson

    7. Introduction History of Computing: Electro-Mechanical Computers: (1920-1945) 1920 – Punch Card Technology 1944 – Mark I (Harvard) similar to Babbage engine. IBM: “electro-mechanical computers will never replace punched card-equipment” 1943 – Colossus (Bletchley Park)

    8. Introduction History of Computing: Electronic Computers: (1940-1950) 1942- First Electronic Computer - ABC uses base-2 number system, memory and logic circuits built from vacuum tubes IBM: “we will never be interested in an electronic computing machine” 1945:“I think there is a world market for maybe 5 computers” Chairman IBM 1946 – ENIAC (Electronic Numerical Integrator & Computer) to compute trajectory tables for the army (only 20% of bombs got within 1000ft) ENIAC’s 18,000 vacuum tubes dimmed the lights of Philadelphia when switched on Used in building first atomic bomb tests at Los Alamos Calculated pi to 2000 places in seventy hours Operated in decimal

    9. ENIAC - details • Decimal (not binary) • 20 accumulators of 10 digits • Programmed manually by switches • 18,000 vacuum tubes • 30 tons • 15,000 square feet • 140 kW power consumption • 5,000 additions per second

    10. von Neumann/Turing Arithmetic and Logic Unit Input Output Equipment Main Memory Program Control Unit • Stored Program concept • Main memory storing programs and data • ALU operating on binary data • Control unit interpreting instructions from memory and executing • Input and output equipment operated by control unit • Princeton Institute for Advanced Studies - IAS • Completed 1952

    11. Introduction History of Computing: Electronic Computers: (1940-1950) 1947- First Computer “Bug” moth found in Mark II relay causing malfunction – hence “debugging” 1947 – Transistor Schockley, Bardeen & Brattain paves the way for smaller, low power and more stable systems to be built using same designs but replacing valve technology with transistor technology

    12. IAS Computer IAS – Institute of Advanced Study (Princeton) 1952 Basic Von Neuman Architecture: • 1000 x 40 bit words • Binary number • 2 x 20 bit instructions • Set of registers (storage in CPU) • Memory Buffer Register • Memory Address Register • Instruction Register • Instruction Buffer Register • Program Counter • Accumulator • Multiplier Quotient

    13. Structure of IAS - detail Central Processing Unit Arithmetic and Logic Unit Accumulator MQ Arithmetic & Logic Circuits MBR Input Output Equipment Instructions & Data Main Memory PC IBR MAR IR Control Circuits Address Program Control Unit

    14. Introduction History of Computing: Electronic Computers: (1950-70) 1954 - First commercial silicon transistor Texas Instruments 1958- First Integrated Circuit Jack Kilby from Texas Instruments made simple oscillator 1971 – 1st Microprocessor -Intel Intel (1968) make 4004 processor to do job of 12 chips 1972 – Pioneer 10 uses 4004 chips intel 4004 is first uprocessor to asteroid belt...

    15. Introduction History of Computing: 1st Generation Computers: (1950-60) Using Valve Technology 1951 - First Commercial Computer UNIVAC–1 correctly forecast US election in 1951 after only 5% of vote was in 1953- IBM 701 1st attempt from IBM 1954 – IBM 650 2nd attempt made as upgrade of punch card machines estimated total market as 50 – sold 1000...

    16. Introduction History of Computing: 2nd Generation Computers: (1960-65) Using transistor technology 1958 – Univac – NTDS 32kwords memory, 10,702 transistors, $500,000, 25kw 1960 – PDP 1 4kwords memory – CRT display first two player computer game – spacewar (1962) 1963 – PDP 8 $18,000 by 1971 25 companies making mini-comp

    17. Introduction History of Computing: 3rd Generation Computers: (1965-70) Using Integrated Circuits 1964 – IBM System 360 Upward compatibility - no need to redevelop when upgrading 1966 – Funding for ARPA net The beginnings of the internet 1967 – First Handheld Electronic Calculator

    18. Introduction 80486 Pentium 4 History of Computing: 4th Generation Computers: (1971- ) Using Large Scale Integrated Circuits 1971 – LSI ICs several thousand transistors on a chip 1971 – Intel invent Microprocessor 1980’s– VLSI ICs several tens of thousands of transistors

    19. Introduction • Multi Processor Systems – the way ahead • Fastest machine on the planet – as of November 2002 – the Earth Simulator in Japan

    20. Generations of Computer • Vacuum tube - 1946-1957 • Transistor - 1958-1964 • Small scale integration - 1965 on • Up to 100 devices on a chip • Medium scale integration - to 1971 • 100-3,000 devices on a chip • Large scale integration - 1971-1977 • 3,000 - 100,000 devices on a chip • Very large scale integration - 1978 to date • 100,000 - 100,000,000 devices on a chip • Ultra large scale integration • Over 100,000,000 devices on a chip

    21. Moore’s Law • Increased density of components on chip • Gordon Moore – co-founder of Intel • Number of transistors on a chip will double every year • Since 1970’s development has slowed a little • Number of transistors doubles every 18 months • Cost of a chip has remained almost unchanged • Higher packing density means shorter electrical paths, giving higher performance • Smaller size gives increased flexibility • Reduced power and cooling requirements • Fewer interconnections increases reliability

    22. Growth in CPU Transistor Count Itanium 2 Pentium 4

    23. Semiconductor Memory • 1970 • Fairchild produce SRAM • Size of a single core • i.e. 1 bit of magnetic core storage • Holds 256 bits • Non-destructive read – 6 transistors • Much faster than core • Intel produce DRAM • Cheaper but slower – 1 transistor • Capacity approximately doubles each year Core Memory DRAM

    24. Speeding it up • Pipelining • On board cache • On board L1 & L2 cache • Branch prediction • Data flow analysis • Speculative execution

    25. Performance Mismatch • Processor speed increased • Memory capacity increased • Memory speed lags behind processor speed

    26. Trends in DRAM use

    27. Solutions • Increase number of bits retrieved at one time • Make DRAM “wider” rather than “deeper” • Change DRAM interface • Cache • Reduce frequency of memory access • More complex cache and cache on chip • Increase interconnection bandwidth • High speed buses • Hierarchy of buses

    28. Internet Resources • http://www.intel.com/ • Search for the Intel Museum • http://www.ibm.com • http://www.dec.com • http://www.digidome.nl • http://ed-thelen.org/comp-hist/ • http://www.computerhistory.org/ • http://www.cs.man.ac.uk/CCS

    29. Syllabus • Introduction • Computer Interconnection Structures • Internal & External Memory • Input & Output • Operating Systems – part 1 • Operating Systems – part 2 • Computer Arithmetic – part 1 • Computer Arithmetic – part 2 • Instruction Sets: Characteristics & Function • Instruction Sets: Addressing Modes & Formats • CPU Structure & Function – part 1 • CPU Structure & Function – part 2 • Control Unit Operation .....................................................................chapter 2 .....................chapter 3 ........................................chapter 4 ................................................................chapter 6 ........................................chapter 7 .....................................chapter 8 ........chapter 9 .chapter 10 .........................chapter 11 ..............................................chapter 14 Computer Organisation & Architecture – William Stallings

    30. von Neumann/Turing Arithmetic and Logic Unit Input Output Equipment Main Memory Program Control Unit • Stored Program concept • Main memory storing programs and data • ALU operating on binary data • Control unit interpreting instructions from memory and executing • Input and output equipment operated by control unit • Princeton Institute for Advanced Studies - IAS • Completed 1952

    31. Program Concept • Hardwired systems are inflexible • General purpose hardware can do different tasks, given correct control signals • Instead of re-wiring, supply a new set of control signals What is a program? A sequence of steps For each step, an arithmetic or logical operation is done For each operation, a different set of control signals is needed Function of Control Unit • For each operation a unique code is provided • e.g. ADD, MOVE • A hardware segment accepts the code and issues the control signals • We have a computer!

    32. Components • The Control Unit and the Arithmetic and Logic Unit constitute the Central Processing Unit • Data and instructions need to get into the system and results out • Input/output • Temporary storage of code and results is needed • Main memory Top Level View

    33. Instruction Cycle • Two steps: • Fetch • Execute

    34. Fetch Cycle Central Processing Unit Arithmetic and Logic Unit MQ Accumulator Arithmetic & Logic Circuits MBR Input Output Instructions & Data Main Memory IBR PC MAR IR Control Circuits Address Program Control Unit • Program Counter (PC) holds address of next instruction to fetch • Processor fetches instruction from memory location pointed to by PC • Increment PC • Unless told otherwise • Instruction loaded into Instruction Register (IR) • Processor interprets instruction and performs required actions

    35. Execute Cycle Central Processing Unit Arithmetic and Logic Unit MQ Accumulator Arithmetic & Logic Circuits MBR Input Output Instructions & Data Main Memory IBR PC MAR IR Control Circuits Address Program Control Unit • Processor-memory • data transfer between CPU and main memory • Processor I/O • Data transfer between CPU and I/O module • Data processing • Some arithmetic or logical operation on data • Control • Alteration of sequence of operations • e.g. jump • Combination of above

    36. Example of Program Execution

    37. Connecting • All the units must be connected • Different type of connection for different type of unit • Memory • Input/Output • CPU Memory Connection • Receives and sends data • Receives addresses (of locations) • Receives control signals • Read • Write • Timing

    38. Input/Output Connection • Similar to memory from computer’s viewpoint • Output • Receive data from computer • Send data to peripheral • Input • Receive data from peripheral • Send data to computer • Receive control signals from computer • Send control signals to peripherals • e.g. spin disk • Receive addresses from computer • e.g. port number to identify peripheral • Send interrupt signals (control)

    39. CPU Connection • Reads instruction and data • Writes out data (after processing) • Sends control signals to other units • Receives (& acts on) interrupts Buses • There are a number of possible interconnection systems • Single and multiple BUS structures are most common • e.g. Control/Address/Data bus (PC) • e.g. Unibus (DEC-PDP)

    40. Data Bus • Carries data • Remember that there is no difference between “data” and “instruction” at this level • “Width” is a key determinant of performance • 8, 16, 32, 64 bit – number of parallel lines Address bus • Identify the source or destination of data • e.g. CPU needs to read an instruction (data) from a given location in memory • Bus width determines maximum memory capacity of system • e.g. 8080 has 16 bit address bus giving 64k address space Control Bus • Control and timing information • Memory read/write signal • Interrupt request • Clock signals

    41. Bus Interconnection Scheme

    42. Big, Red & Double Decker? • What do buses look like? • Parallel lines on circuit boards • Ribbon cables • Strip connectors on mother boards • e.g. PCI • Sets of wires Single Bus Problems • Lots of devices on one bus leads to: • Propagation delays • Long data paths mean that co-ordination of bus use can adversely affect performance • If aggregate data transfer approaches bus capacity • Most systems use multiple buses to overcome these problems

    43. Traditional Bus Strtucture

    44. High Performance Bus

    45. Bus Types • Dedicated • Separate data & address lines • Multiplexed • Shared lines • Address valid or data valid control line • Advantage - fewer lines • Disadvantages • More complex control • Ultimate performance

    46. Bus Arbitration • More than one module controlling the bus • e.g. CPU and DMA controller • Only one module may control bus at one time • Arbitration may be centralised or distributed Centralised Arbitration • Single hardware device controlling bus access • Bus Controller or Arbiter • May be part of CPU or separate Distributed Arbitration Each module may claim the bus Control logic on all modules

    47. Timing • Co-ordination of events on bus • Synchronous • Events determined by clock signals • Control Bus includes clock line • A single 1-0 is a bus cycle • All devices can read clock line • Usually sync on leading edge • Usually a single cycle for an event

    48. Synchronous Timing Diagram

    49. Asynchronous Timing Diagram