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IKI20210 Pengantar Organisasi Komputer Kuliah No. 24: Aritmatika PowerPoint Presentation
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IKI20210 Pengantar Organisasi Komputer Kuliah No. 24: Aritmatika

IKI20210 Pengantar Organisasi Komputer Kuliah No. 24: Aritmatika

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IKI20210 Pengantar Organisasi Komputer Kuliah No. 24: Aritmatika

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  1. IKI20210Pengantar Organisasi KomputerKuliah No. 24: Aritmatika Sumber:1. Hamacher. Computer Organization, ed-4.2. Materi kuliah CS61C/2000 & CS152/1997, UCB. 3 Januari 2003 Bobby Nazief (nazief@cs.ui.ac.id)Johny Moningka (moningka@cs.ui.ac.id) bahan kuliah: http://www.cs.ui.ac.id/~iki20210/

  2. Two’s Complement Number line 00000 11111 • 2 N-1 non-negatives • 2 N-1 negatives • one zero • how many positives? • comparison? • overflow? 00001 11110 00010 0 -1 1 2 -2 . . . . . . 15 -15 -16 01111 10001 10000

  3. Two’s Complement Formula • Can represent positive and negative numbers in terms of the bit value times a power of 2: • d31 x -231+ d30 x 230 + ... + d2 x 22 + d1 x 21 + d0 x 20 • Example1111 1111 1111 1111 1111 1111 1111 1100two = 1x-231+1x230 +1x229+...+1x22+0x21+0x20 = -231+ 230 + 229 + ...+ 22 + 0 + 0 = -2,147,483,648ten + 2,147,483,644ten = -4ten • Note: need to specify width: we use 32 bits

  4. Two’s complement shortcut: Negation • Invert every 0 to 1 and every 1 to 0, then add 1 to the result • Sum of number and its one’s complement must be 111...111two • 111...111two= -1ten • Let x’ mean the inverted representation of x • Then x + x’ = -1  x + x’ + 1 = 0  x’ + 1 = -x • Example: -4 to +4 to -4x : 1111 1111 1111 1111 1111 1111 1111 1100twox’: 0000 0000 0000 0000 0000 0000 0000 0011two+1: 0000 0000 0000 0000 0000 0000 0000 0100two()’: 1111 1111 1111 1111 1111 1111 1111 1011two+1: 1111 1111 1111 1111 1111 1111 1111 1100two

  5. Addition & Subtraction Operations • Addition: • Just add the two numbers • Ignore the Carry-out from MSB • Result will be correct, provided there’s no overflow • Subtraction: • Form 2’s complement of the subtrahend • Add the two numbers as in Addition 0 1 0 1 (+5)+0 0 1 0 (+2) 0 1 1 1 (+7) 0 1 0 1 (+5)+1 0 1 0 (-6) 1 1 1 1 (-1) 0 0 1 0 (+2) 0 0 1 00 1 0 0 (+4) +1 1 0 0 (-4) 1 1 1 0 (-2) 1 0 1 1 (-5)+1 1 1 0 (-2)11 0 0 1 (-7) 0 1 1 1 (+7)+1 1 0 1 (-3)10 1 0 0 (+4) 1 1 1 0 (-2) 1 1 1 01 0 1 1 (-5) +0 1 0 1 (+5)10 0 1 1 (+3)

  6. Overflow Detection • Overflow: the result is too large (or too small) to represent properly • Example: - 8 < = 4-bit binary number <= 7 • When adding operands with different signs, overflow cannot occur! • Overflow occurs when adding: • 2 positive numbers and the sum is negative • 2 negative numbers and the sum is positive • On your own: Prove you can detect overflow by: • Carry into MSB ° Carry out of MSB 0 1 1 1 1 0 0 1 1 1 7 1 1 0 0 –4 3 – 5 + 0 0 1 1 + 1 0 1 1 1 0 1 0 – 6 0 1 1 1 7

  7. Arithmetic & Branching Conditions

  8. Condition Codes • CC Flags will be set/cleared by arithmetic operations: • N (negative): 1 if result is negative (MSB = 1), otherwise 0 • C (carry): 1 if carry-out(borrow) is generated, otherwise 0 • V (overflow): 1 if overflow occurs, otherwise 0 • Z (zero): 1 if result is zero, otherwise 0 0 1 0 1 (+5)+0 1 0 0 (+4) 1 0 0 1 (-7?) 0 1 0 1 (+5)+1 0 1 0 (-6)1 1 1 1 (-1) 0 0 1 1 (+3)+1 1 0 1 (-3)10 0 0 0 (0) 0 1 1 1 (+7)+1 1 0 1 (-3)10 1 0 0 (+4)

  9. Multiplication of Positive Numbers

  10. Unsigned Multiplication • Paper and pencil example (unsigned): Multiplicand 1101 (13)Multiplier1011 (11) 11011101 00001101Product 10001111 (143) • m bits x n bits = m+n bit product • Binary makes it easy: • 0 => place 0 ( 0 x multiplicand) • 1 => place a copy ( 1 x multiplicand)

  11. 0 0 0 0 A3 A2 A1 A0 B0 A3 A2 A1 A0 B1 A3 A2 A1 A0 B2 A3 A2 A1 A0 B3 P7 P6 P5 P4 P3 P2 P1 P0 Unsigned Combinational Multiplier • Stage i accumulates A * 2 i if Bi == 1

  12. A3 A2 A1 A0 A3 A2 A1 A0 A3 A2 A1 A0 A3 A2 A1 A0 How does it work? 0 0 0 0 0 0 0 B0 • at each stage shift A left ( x 2) • use next bit of B to determine whether to add in shifted multiplicand • accumulate 2n bit partial product at each stage B1 B2 B3 P7 P6 P5 P4 P3 P2 P1 P0

  13. Multiplier Circuit 32 bits Multiplicand 0 Multiplicand 1101 C ProductMultiplier0 0000 10110 1101 1011 Add0 0110 1101 Shift 1 0011 1101 Add0 1001 1110 Shift 0 1001 1110 NoAdd0 0100 1111 Shift 1 0001 1111 Add0 1000 1111 Shift MUX Shift Right Control 32-bit FA Add/NoAdd C Product (Multiplier) 64 bits 32 bits

  14. Signed-Operand & Multiplication

  15. Signed Multiplication • Negative Multiplicand: Multiplicand 10011 (-13)Multiplier 01011 (+11)1111110011111110011000000001110011000000Product 1101110001 (-143) • Negative Multiplier: • Form 2’s complement of both multiplier and multiplicand • Proceed as above

  16. Motivation for Booth’s Algorithm • Works well for both Negative & Positive Multipliers • Example 2 x 6 = 0010 x 0110: 0010 x 0110 + 0000 shift (0 in multiplier) + 0010 add (1 in multiplier) + 0100 add (1 in multiplier) + 0000 shift (0 in multiplier) 00001100 • FA with add or subtract gets same result in more than one way: 6 = – 2 + 8 0110 = – 00010 + 01000 = 11110 + 01000 • For example • 0010 x 0110 00000000shift (0 in multiplier) 1111110 sub(first 1 in multpl.)000000shift (mid string of 1s) + 00010 add (prior step had last 1) 00001100

  17. Booth’s Algorithm Current Bit Bit to the Right Explanation Example Op 1 0 Begins run of 1s 0001111000 sub 1 1 Middle of run of 1s 0001111000 none 0 1 End of run of 1s 0001111000 add 0 0 Middle of run of 0s 0001111000 none Originally for Speed (when shift was faster than add) • Small number of additions needed when multiplier has a few large blocks of 1s

  18. Booths Example (2 x 7) Operation Multiplicand Product next? 0. initial value 0010 0000 0111 0 10 -> sub 1a. P = P - m 1110 + 1110 1110 0111 0 shift P (sign ext) 1b. 0010 1111 00111 11 -> nop, shift 2. 0010 1111 10011 11 -> nop, shift 3. 0010 1111 11001 01 -> add 4a. 0010 + 0010 0001 11001 shift 4b. 0010 0000 1110 0 done

  19. Booths Example (2 x -3) Operation Multiplicand Product next? 0. initial value 0010 0000 1101 0 10 -> sub 1a. P = P - m 1110 + 1110 1110 1101 0 shift P (sign ext) 1b. 0010 1111 01101 01 -> add + 0010 2a. 0001 01101shift P 2b. 0010 0000 10110 10 -> sub + 1110 3a. 0010 1110 10110 shift 3b. 0010 1111 0101 1 11 -> nop 4a 1111 0101 1 shift 4b. 0010 1111 10101 done

  20. Fast Multiplication (read yourself!)

  21. Integer Division

  22. Divide: Paper & Pencil 1001 Quotient Divisor 1000 1001010 Dividend–1000 10 101 1010–1000 10 Remainder (or Modulo result) • See how big a number can be subtracted, creating quotient bit on each step Binary => 1 * divisor or 0 * divisor • Dividend = Quotient x Divisor + Remainder=> | Dividend | = | Quotient | + | Divisor |

  23. Divisor Division Circuit 33 bits Shift Left Control 33-bit FA Q Setting Remainder (Quotient) 65 bits 33 bits Sign-bit Checking

  24. 0010QuotientDivisor11 1000 Dividend 1110Remainder Restoring Division Algorithm RemainderQuotient Initially 00000 1000Shift 00001 000_Sub(-11) 11101Set q0 11110Restore 00001 0000 Shift 00010 000_Sub(-11) 11101Set q0 11111Restore 00010 0000 Shift 00100 000_Sub(-11) 11101Set q0 00001 00001 0001 Shift 00010 001_Sub(-11) 11101 001_Set q0 11111Restore 00010 0010

  25. Tugas Lab No. 4: I/O & Interupsi • Tugas Kelompok • Ukuran kelompok  ditentukan pada saat tutorial (bergantung jumlah STK200 yang masih berfungsi) • Tutorial oleh Asisten Lab • 8 – 9 Januari 2003 • Batas Waktu Pengumpulan Tugas (termasuk Demo) • 22 – 23 Januari 2003

  26. Floating-point Numbers & Operations

  27. Review of Numbers • Computers are made to deal with numbers • What can we represent in N bits? • Unsigned integers: 0 to 2N - 1 • Signed Integers (Two’s Complement) -2(N-1) to 2(N-1) - 1

  28. Other Numbers • What about other numbers? • Very large numbers? (seconds/century)3,155,760,00010 (3.1557610 x 109) • Very small numbers? (atomic diameter)0.0000000110 (1.010 x 10-8) • Rationals (repeating pattern)2/3 (0.666666666. . .) • Irrationals21/2 (1.414213562373. . .) • Transcendentalse (2.718...),  (3.141...) • All represented in scientific notation

  29. exponent mantissa radix (base) decimal point Scientific Notation Review • Normalized form: no leadings 0s (exactly one digit to left of decimal point) • Alternatives to representing 1/1,000,000,000 • Normalized: 1.0 x 10-9 • Not normalized: 0.1 x 10-8,10.0 x 10-10 6.02 x 1023

  30. exponent Mantissa radix (base) “binary point” Scientific Notation for Binary Numbers • Computer arithmetic that supports it called floating point, because it represents numbers where binary point is not fixed, as it is for integers • Declare such variable in C as float 1.0two x 2-1

  31. 31 30 23 22 0 S Exponent Significand 1 bit 8 bits 23 bits Floating Point Representation (1/2) • Normal format: +1.xxxxxxxxxxtwo*2yyyytwo • Multiple of Word Size (32 bits) • S represents SignExponent represents y’sSignificand represents x’s • Represent numbers as small as 2.0 x 10-38 to as large as 2.0 x 1038

  32. Floating Point Representation (2/2) • What if result too large? (> 2.0x1038 ) • Overflow! • Overflow => Exponent larger than represented in 8-bit Exponent field • What if result too small? (>0, < 2.0x10-38 ) • Underflow! • Underflow => Negative exponent larger than represented in 8-bit Exponent field • How to reduce chances of overflow or underflow?

  33. 31 30 20 19 0 S Exponent Significand 1 bit 11 bits 20 bits Significand (cont’d) 32 bits Double Precision Fl. Pt. Representation • Next Multiple of Word Size (64 bits) • Double Precision (vs. Single Precision) • C variable declared as double • Represent numbers almost as small as 2.0 x 10-308 to almost as large as 2.0 x 10308 • But primary advantage is greater accuracy due to larger significand

  34. IEEE 754 Floating Point Standard (1/4) • Single Precision, DP similar • Sign bit: 1 means negative 0 means positive • Significand: • To pack more bits, leading 1 implicit for normalized numbers • 1 + 23 bits single, 1 + 52 bits double • always true: 0 < Significand < 1 (for normalized numbers) • Note: 0 has no leading 1, so reserve exponent value 0 just for number 0

  35. IEEE 754 Floating Point Standard (2/4) • Kahan wanted FP numbers to be used even if no FP hardware; e.g., sort records with FP numbers using integer compares • Could break FP number into 3 parts: compare signs, then compare exponents, then compare significands • Wanted it to be faster, single compare if possible, especially if positive numbers • Then want order: • Highest order bit is sign ( negative < positive) • Exponent next, so big exponent => bigger # • Significand last: exponents same => bigger #

  36. 0 0111 1110 000 0000 0000 0000 0000 0000 1/2 2 0 1000 0000 000 0000 0000 0000 0000 0000 0 1111 1111 000 0000 0000 0000 0000 0000 1/2 2 0 0000 0001 000 0000 0000 0000 0000 0000 IEEE 754 Floating Point Standard (3/4) • Negative Exponent? • 2’s comp? 1.0 x 2-1 v. 1.0 x2+1 (1/2 v. 2) • This notation using integer compare of 1/2 v. 2 makes 1/2 > 2! • Instead, pick notation 0000 0001 is most negative, and 1111 1111 is most positive • 1.0 x 2-1 v. 1.0 x2+1 (1/2 v. 2)

  37. 31 30 23 22 0 S Exponent Significand 1 bit 8 bits 23 bits IEEE 754 Floating Point Standard (4/4) • Called Biased Notation, where bias is number subtract to get real number • IEEE 754 uses bias of 127 for single prec. • Subtract 127 from Exponent field to get actual value for exponent • 1023 is bias for double precision • Summary (single precision): • (-1)S x (1 + Significand) x 2(Exponent-127) • Double precision identical, except with exponent bias of 1023

  38. Special Numbers • What have we defined so far? (Single Precision) Exponent Significand Object 0 0 0 0 nonzero ??? 1-254 anything +/- fl. pt. # 255 0 +/- infinity 255 nonzero NaN

  39. Infinity and NaNs result of operation overflows, i.e., is larger than the largest number that can be represented overflow is not the same as divide by zero (raises a different exception) S 1 . . . 1 0 . . . 0 +/- infinity It may make sense to do further computations with infinity e.g., X/0 > Y may be a valid comparison Not a number, but not infinity (e.q. sqrt(-4)) invalid operation exception (unless operation is = or =) S 1 . . . 1 non-zero NaN HW decides what goes here NaNs propagate: f(NaN) = NaN

  40. FP Addition • Much more difficult than with integers • Can’t just add significands • How do we do it? • De-normalize to match exponents • Add significands to get resulting one • Keep the same exponent • Normalize (possibly changing exponent) • Note: If signs differ, just perform a subtract instead.

  41. FP Subtraction • Similar to addition • How do we do it? • De-normalize to match exponents • Subtract significands • Keep the same exponent • Normalize (possibly changing exponent)

  42. Extra Bits for rounding "Floating Point numbers are like piles of sand; every time you move one you lose a little sand, but you pick up a little dirt." How many extra bits? IEEE: As if computed the result exactly and rounded. • Guard Digits: digits to the right of the first p digits of significand to guard against loss of digits – can later be shifted left into first P places during normalization. • Addition: carry-out shifted in • Subtraction: borrow digit and guard • Multiplication: carry and guard, Division requires guard Addition: 1.xxxxx 1.xxxxx 1.xxxxx + 1.xxxxx 0.001xxxxx 0.01xxxxx 1x.xxxxy 1.xxxxxyyy 1x.xxxxyyy post-normalization pre-normalization pre and post

  43. Rounding Digits normalized result, but some non-zero digits to the right of the significand --> the number should be rounded E.g., B = 10, p = 3: 2-bias 0 2 1.69 = 1.6900 * 10 = - .0785 * 10 = 1.6115 * 10 2-bias 0 0 7.85 - 2-bias 0 2 1.61 one round digit must be carried to the right of the guard digit so that after a normalizing left shift, the result can be rounded, according to the value of the round digit IEEE Standard: four rounding modes: round to nearest (default) round towards plus infinity round towards minus infinity round towards 0 round to nearest: round digit < B/2 then truncate > B/2 then round up (add 1 to ULP: unit in last place) = B/2 then round to nearest even digit it can be shown that this strategy minimizes the mean error introduced by rounding

  44. Sticky Bit Additional bit to the right of the round digit to better fine tune rounding d0 . d1 d2 d3 . . . dp-1 0 0 0 0 . 0 0 X . . . X X X S X X S Sticky bit: set to 1 if any 1 bits fall off the end of the round digit + d0 . d1 d2 d3 . . . dp-1 0 0 0 0 . 0 0 X . . . X X X 1 d0 . d1 d2 d3 . . . dp-1 0 0 0 0 . 0 0 X . . . X X X 0 - - X X 0 generates a borrow Rounding Summary: Radix 2 minimizes wobble in precision Normal operations in +,-,*,/ require one carry/borrow bit + one guard digit One round digit needed for correct rounding Sticky bit needed when round digit is B/2 for max accuracy Rounding to nearest has mean error = 0 if uniform distribution of digits are assumed

  45. Denormalized Numbers 2-bias denorm gap 1-bias -bias 2 2 0 2 normal numbers with hidden bit --> B = 2, p = 4 The gap between 0 and the next representable number is much larger than the gaps between nearby representable numbers. IEEE standard uses denormalized numbers to fill in the gap, making the distances between numbers near 0 more alike. 2-bias 1-bias -bias 2 2 0 2 p-1 bits of precision p bits of precision same spacing, half as many values! NOTE: PDP-11, VAX cannot represent subnormal numbers. These machines underflow to zero instead.