High-K Dielectrics: Extending Current Semiconductor Manufacturing Techniques. by Alexander Glavtchev. Introduction. Since the 1960’s semiconductor industry has used poly-Silicon gate with a Silicon dioxide gate dielectric layer.
Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.
The drive current ID for a MOSFET can be approximated by the following equation:
W is the transistor channel width
L is the transistor channel length
μ is carrier mobility (which can be treated as a constant in this approximation)
C is the capacitance density associated with the gate dielectric
VG is the applied gate voltage
VD is the applied drain voltage
VT is the threshold voltage
It can be seen that ID increases almost linearly with VD until a maximum ID is reached when:
IDS is the saturated drain current, and it results when VG≥ VT and a carrier channel has been established under the gate.
Thus, it can be seen that decreasing the channel length or increasing the Capacitance will increase the drain current IDS and establish a channel beneath the gate (ON state).
The capacitance of the gate can be modeled as a parallel-plate capacitor (ignoring quantum effects and depletion):
where A is the Area of the capacitor and t is the thickness.
Since the t is greater for the new dielectric gate material, it requires an even larger dielectric constant k to increase the overall capacitance – that’s where the new high-k dielectric materials come into play. These materials are Hafnium-based and will have k > 3.9, the dielectric constant of SiO2.