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Calvin College - Engineering Department Analog Design Spring 2002 Engineering 332. Professor: Paulo F. Ribeiro, SB130 X6407, PRIBEIRO@CALVIN.EDU Textbook: Sedra / Smith, Microelectronic Circuits, Fourth Edition Lectures: 12:30-1:20PM (MWF) SB203
Professor: Paulo F. Ribeiro, SB130 X6407, PRIBEIRO@CALVIN.EDU
Textbook: Sedra / Smith, Microelectronic Circuits, Fourth Edition
Lectures: 12:30-1:20PM (MWF) SB203
Laboratory (Wednesdays 1:30-4:20 PM) SB 136 and SB28
To focus on the design of amplifiers, filters, oscillators, and converters with an emphasis on design.
Differential and Multistage Amplifiers, Frequency Response, Feedback, Output Stages, Analog Integrated Circuits (741), Filters and Tuned Amplifiers, Signal Generators.
2-3 lectures per week plus 3-hour laboratory.
Contribution of course to meeting the professional component
This course contributes primarily to the students' knowledge of engineering topics, and does provide design experience.
This course primarily serves students in the department. The information below describes how the course contributes to the undergraduate program objectives.
Mastery of specific technical design skills which are key to a wide range of electrical engineering applications. Mastery and critical evaluation of the use of computer aided simulation tools (SPICE) as an engineering design aid.
Assessment of student progress toward course objectives
Student's design skills is assessed primarily on detailed homework and design problems that involve the use of analytical and simulation tools such as PSPICE.
Topics Chapter # of classes
Differential and Multistage Amplifiers 6 6
Frequency Response 7 6
Feedback 8 6
Output Stages 9 6
Analog Integrated Circuits (741) 10 3
Filters and Tuned Amplifiers 11 3
Signal Generators 12 3
Design Part II: Chapters 8, 9, 10
Final Design: Chapter 11, 12
Spring Break March 9-18
Reading Recess April 16-17
Design Part I 20%
Design Part II 20%
Homework and Assignments 15%
Final Design 20%
The most widely used circuit building block in analog integrated circuits.
Use BJTs, MOSFETS and MESFETs (metal semiconductor FET – read 5.12 – Gallium Arsenide-GaAs Device).
Connection to RC not essential to the operation
Essential that Q1 and Q2 never enter saturation
Implemented by a transistor circuit
vE = vCM-VBE
vC1 = VCC – ( ½) a I RC
vC2 = VCC – ( ½) a I RC
vC1 – vC2 = ?
Vary vCM (what happens?)
Differential pair with a common-mode input
vB1 = +1
vE = 0.3
Keeps Q2 off
vC1 = VCC - a I RC
vC2 = VCC
Differential pair with a large differential input
Differential pair with a large differential input o opposite polarity
To that of (b)
Differential pair with a small differential input
Which can be manipulated to yield
The collector currents
can be obtained by multiplying the emitter currents by Alfa, which is ver close to unity
Relatively small difference voltage vB1 – vB2 will cause the current I to flow almost entirely in one of the two transistors.
4.VT (~100mV) is sufficient to switch the current to one side of the pair.
The Collector Currents When vd is applied
Interpretation: IC1 increases by ic and iC2 decreases by ic
Assume I to be ideal – its incremental resistance will be infinite and vd appears across a total resistance 2.re.
A simple technique for determining the signal currents in a differential amplifier excited by a differential voltage signal vd; dc quantities are not shown.
A differential amplifier with emitter resistances. Only signal quantities are shown (on color).
This is the resistance-reflection rule; the resistance seen between the two bases is equal to the total resistance in the emitter circuit multiplied by the beta+1
The voltage gain is equal to the ratio of the total resistance in the collector circuit (2RC) to the total resistance in the emitter circuit (2re+2RE)
Differential amplifier fed in a complementary manner (push-pull or balanced)
Base of Q1 raised
Based of Q2 lowered
Equivalence of the differential amplifier (a) to the two common-emitter amplifiers in (b). This equivalence applies only for differential input signals. Either of the two common-emitter amplifiers in (b) can be used to evaluate the differential gain, input differential resistance, frequency response, and so on, of the differential amplifier.
If output is taken single-endedly
Acm and the differential gain AdWe can define CMRR
2 . Ricm
Equivalent common-mode half-circuit
Since the input common-mode resistance is usually very large, its value will be affected by the transistor resistances
R0 and rm
God Calls Us to be agents:
Of Peace and Reconciliation
For the Flourishing of the Natural Creation
For the Growth of other people
Finally, brothers, whatever is true, wherever is noble, whatever is right, what ever is pure, whatever is lovely, whatever is admirable – if anything is excellent or praiseworthy – think about such things.
I gladly admit that we number among us men and women whose modesty, courtesy, fair-mindedness, patience in disputation and readiness to see an antagonist's point of view, are wholly admirable. I am fortunate to have known them. But we must also admit that we show as high percentage as any group whatever of bullies, paranoiacs, backbiters, mopes, milksops, etc.. The loutishness that turns every argument into a quarrel is really no rarer among us than among the sub-literate; the restless inferiority-complex (“stern to inflict” but not “stubborn to endure”) which bleeds at a touch but scratches like a wildcat is almost as common among us as among schoolgirls.
Many resistors, transistors and capacitors makes impossible to use conventional biasing methods
Biasing in IC is based on the use of constant-current sources
The Diode-Connected Transistor
Shorting the base and the collector of a BJT results in a two-terminal device having an I-v characteristic identical ot the iE-vBE of the BJT.
Since the BJT is still in active mode (vCB=0 results in an active mode operation) the current I divides between base and collector according to the value of the BJT Beta.
Thus, the BJT still operates as a transistor in the active mode. This is the reason the I-v characteristics of the resulting diode is identical to the iE-vBE relationship of the BJT
Finite Beta and Early Effect
Get wisdom, get understanding; do not forget my words or swerve from them. Do not forsake wisdom, and she will protect you; love her, and she will watch over you. Wisdom is supreme; therefore get wisdom. Though it cost all you have, get understanding. Esteem her, and she will exalt you; embrace her, and she will honor you. She will set a garland of grace on your head and present you with a crown of splendor. Prov. 4:4-8
However, this impulse to pursue the intellectual life must be kept "pure and disinterested," for the alternative is to "come to love knowledge-our knowing-more than the thing known: to delight not in the exercise of our talents but in the fact that they are ours, or even in the reputation they bring us".
We must not think Pride is something God forbids because He is offended at it, or that Humility is something He demands as due to His own dignity -- as if God Himself was proud. He is not in the least worried about His dignity. The point is, He wants you to know Him: wants to give you Himself. And He and you are two things of such a kind that if you really get into any kind of touch with Him you will, in fact, be humble -- delightedly humble, feeling the infinite relief of having for once got rid of all the silly nonsense about your own dignity which has made you restless and unhappy all your life. He is trying to make you humble in order to make this moment possible: trying to take off a lot of silly, ugly, fancy-dress in which we have all got ourselves up and are strutting about like the little idiots we are.
2 power supplies
IREF is generated in the branch of the diode-connected transistor Q1, resistor R, and the diode-connected transistor Q2.
Generation of a number of cross currents.
1 - The MOS mirror does not suffer from the finite Beta
2 – Ability to operate close to the power supply is an important issue on IC design
3 - Current Transfer: BJTs ~ relative areas; MOS ~ W/L
4 - VA lower for MOS
Improved Current-Source Circuits
Output resistance equal
A factor greater the then simple
Disadvantage: reduced output swing.
Observe that the voltage at the collector at Q3 has to be greater than the negative supply voltage by
(vBB1 = VCEsat-3), which is about a volt.
It differs from the basic current mirror in an important way: a resistor RE is included in the emitter lead of Q2. Neglecting the base current we can write:
Calculating 1st stage gain
-- Assuming b=100
Model Eqs. on Pg. 263
In the same manor
Current sources for biasing amplifying stages
By Justin Jansen
Total collector resistance
Calculating 1st stage gain
Total emitter resistance
Calculating 2nd stage gain
re4 and re5 calc. before
Potential gain is halved b/c converting to single-ended output
Calculating 3rd stage gain
Purpose is to allow amplified signal to swing negatively
Calculating 3rd stage gain
When the Philistines heard that Israel had assembled at Mizpah, the rulers of the Philistines came up to attack them. And when the Israelites heard of it, they were afraid because of the Philistines.
 They said to Samuel, "Do not stop crying out to the Lord our God for us, that he may rescue us from the hand of the Philistines."
 Then Samuel took a suckling lamb and offered it up as a whole burnt offering to the Lord. He cried out to the Lord on Israel's behalf, and the Lord answered him.
 While Samuel was sacrificing the burnt offering, the Philistines drew near to engage Israel in battle. But that day the Lord thundered with loud thunder against the Philistines and threw them into such a panic that they were routed before the Israelites.
 THEN SAMUEL TOOK A STONE AND SET IT UP BETWEEN MIZPAH AND SHEN. HE NAMED IT EBENEZER, SAYING, "THUS FAR HAS THE LORD HELPED US."
"The only people who achieve much are those who want knowledge so badly that they seek it while the conditions are unfavorable. Favorable conditions never come."
How shall a young man be faultless in his way?By keeping to your words.With all my heart I seek you;let me not stray from your commands.Within my heart I treasure your promise,that I may not sin against you.Blessed are you, O Lord;teach me your statutes.With my lips I declareall the ordinances of your mouth.In the way of your decrees I rejoice,as much as in all riches.Ps 119: 9-14
Experience, the most brutal of teachers; but you learn, my God do you learn.
The purpose of this lab is to investigate the behavior of a BJT difference amplifier. The circuit’s behavior needs to be modeled with theoretical equations and a computer simulation. Comparison of laboratory results with theoretical and simulated results is required for the relative validity of the models.
This lab also investigates the variation of differential and common mode gains using a Monte Carlo analysis.
Construct the circuit in Figure 1 on PSpice and a Jameco JE26 Breadboard using a Hewlett-Packard 6205 Dual DC Power Supply as the voltage sources and an MPQ2222 Bipolar Junction Transistor (Q2N2222).
Using a Keithley 169 Digital Multi-Meter measure the voltages across the resistors to determine the transistor base current and collector current. From these current values calculate .
Figure 1) Circuit for testing transistor value
Next construct the amplifier circuit shown in Figure 2. All transistors are MPQ2222 Bipolar Junction Transistors. Use PSpice to construct the circuit.
Measure the DC values at the collector of Q1 and Q2. Do the measured values agree with theoretical ones.
Measure the DC value at the emitter of Q1 and Q2. Do the measured value agree with the theoretical one.
Indicate the inverting and non-inverting output.
Input an AC signal into Q1 of your circuit at frequencies . What is the single voltage gain of your circuit?
Both inputs (Vin1 and Vin2) should be then grounded in order to determine the DC operating point of the amplifier. Bias point voltages are measured and then compared to the bias points produced by the PSpice simulation. Record DC bias point data.
Use a Wavetek 190 Function Generator with a sinusoidal input voltage of amplitude 0.031 V and apply to one of the input terminals and the other terminal remained grounded, as shown in figure 2. Use a Tektronix TDS 360 Digital Oscilloscope and a Fluke 1900A Multi-Meter the output of the amplifier to observe input signal frequencies. Determine the corner frequency (3-dB point) of the output and compared with the corner frequency generated with an AC sweep in PSpice. Plot the PSpice AC sweep simulation.
Next calculate the differential mode voltage gain, AV-dm, from the laboratory data and compare to the AV-dm predicted by the PSpice simulation and theoretical equations. Both inputs are tied together to create a common mode signal on the input terminals. The output voltage is then used to calculate the common mode voltage gain, AV-cm, and then compared to the AV-cm predicted by the PSpice simulation and theoretical equations. From these values the common mode rejection ratio (CMRR) should be calculated for each case.
Finally, PSpice should be used to perform a Monte Carlo analysis of the circuit. The resistors were all given standard unbridged values and were allowed to vary uniformly within 5% of the nominal resistor value. The transistors should be given a nominal value (say 175) and allowed to vary uniformly to +/- 100. The variations of differential and common mode gains should be graphed on two histograms.
What are the values of for the first transistor?
(typical values of range from approximately 125 to 225)
With the exception of the Monte Carlo analysis, all transistors were assumed to have this value in the PSpice simulations. All four transistors were contained within one integrated circuit so that hopefully there would be little change in values from one transistor to the next, making the previous assumption reasonably valid.
How close are the measured DC bias points of the circuit to those predicted by the PSpice simulation?
What is the reason for the small differences between measured and predicted voltages?
Found in Faith-Lost in Matters of Learning and Intellectual Integrity.
The supreme end of education is expert discernment in all things - - the power to tell the good from the bad, the genuine from the counterfeit, and to prefer the good and the genuine to the bad and the counterfeit.
Independence / obedience, honesty, humility, fairness…
Let integrity and uprightness preserve me.
S-Domain Analysis Poles and Zeros
and I will walk in your truth;
give me an undivided heart,
that I may fear your name.
"As for you, my son Solomon, know the God of your father, and serve Him with a whole heart and a willing mind; for the LORD searches all hearts, and understands every intent of the thoughts.
(1 Chr. 28:9)
"What is the main idea of...?""What if...?""How does...affect...?" "What is the meaning of...?""Why is...important?" "What is a new example of...?""Explain why...." "Explain how...." "How does...relate to what I've learned before?" "What conclusions can I draw about...?"What is the difference between ... and ...?""How are ... and ... similar?""How would I use ... to ...?""What are the strengths and weaknesses of...?"
The Three Frequency Bands (AM, wl, wh, BW, GB)
The Gain Function A(s) and the Low-Frequency Response
Language exists to communicate whatever it can communicate. Some things it communicates so badly that we never attempt to communicate them by words if any other medium is available.
Creation, Fall and Redemption:
A Controls Systems Perspective
Creation, Fall and Redemption:
A Mathematical Perspective
The reason that some intuitive minds are not mathematical is that they cannot at all turn their attention to the principles of mathematics. But the reason that mathematicians are not intuitive is that they do not see what is before them …since they are accustomed to the exact principles of mathematics… and are lost in matters of intuition where the principles do not allow of such arrangement.
For the Approximate Determination of wL and wH
Dominant Pole Exists
Design of the Coupling Cc1 and Cc2
and Bypass Capacitors Cs
To place the lower 3-db frequency wl at the specified value.
A MOSFET common-source amplifier (a), and a BJT common-emitter amplifier (b). here, Vs and Rs represent the Thévenin equivalent of the circuit at the input side, including the output circuit of the preceding amplifier stage (if any) and the bias network of the transistor Q (if any). Similarly, RL represents the total resistance between the drain (the collector) and signal ground. Although signal ground at the source (emitter) is shown established by a large capacitor, this is not necessary, and the circuits can be used to represent, for instance, the differential half-circuit of a differential pair.
(a) Equivalent circuit for analyzing the high-frequency response of the amplifier circuit of Fig. 7.15(a). Note that the MOSFET is replaced with its high-frequency equivalent-circuit. (b) A slightly simplified version of (a) by combining RL and ro into a single resistance R’L = RL//ro.
1 - Desensitize The Gain
2 - Reduce Nonlinear Distortions
3 - Reduce The Effect of Noise
4 – Control The Input And Output Impedances
5 – Extend The Bandwidth Of The Amplifier
The General Feedback Structure
Noise Reduction, Reduction of Nonlinear Distortion
The four basic feedback topologies: (a) voltage-sampling series-mixing (series-shunt) topology; (b) current-sampling shunt-mixing (shunt-series) topology; (c) current-sampling series-mixing (series-series) topology; (d) voltage-sampling shunt-mixing (shunt-shunt) topology.