Computer Organization

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# Computer Organization - PowerPoint PPT Presentation

## Computer Organization

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1. Computer Organization Lecture 1 Bryant’s Book Chapter 1 CSCE 312

2. Course Overview • Topics: • Theme • Five great realities of computer systems • Computer System Overview • Summary • NOTE: Most slides are from the textbook and the co-author Randal E Bryant of Carnegie Mellon University CSCE 312

3. Course Theme • Abstraction is good, but don’t forget reality! • Courses to date emphasize abstraction • Abstract data types • Asymptotic analysis • These abstractions have limits • Especially in the presence of bugs • Need to understand underlying implementations • Useful outcomes • Become more effective programmers • Able to find and eliminate bugs efficiently • Able to tune program performance • Prepare for later “systems” classes in CSE & ECE • Compilers, Operating Systems, Networks, Computer Architecture, Embedded Systems CSCE 312

4. Great Reality #1 • Int’s are not Integers, Float’s are not Reals • Examples • Is x2 ≥ 0? • Float’s: Yes! • Int’s: • 40000 * 40000 --> 1600000000 • 50000 * 50000 --> ?? • Is (x + y) + z = x + (y + z)? • Unsigned & Signed Int’s: Yes! • Float’s: • (1e20 + -1e20) + 3.14 --> 3.14 • 1e20 + (-1e20 + 3.14) --> ?? CSCE 312

5. Computer Arithmetic • Does not generate random values • Arithmetic operations have important mathematical properties • Cannot assume “usual” properties • Due to finiteness of representations • Integer operations satisfy “ring” properties • Commutativity, associativity, distributivity • Floating point operations satisfy “ordering” properties • Monotonicity, values of signs • Observation • Need to understand which abstractions apply in which contexts • Important issues for compiler writers and serious application programmers • Entire courses offered on computer arithmetic (ECEN 653) CSCE 312

6. Great Reality #2 • You’ve got to know assembly • Chances are, you’ll never write a program in assembly • Compilers are much better & more patient than humans • Understanding assembly key to understanding machine-level execution model • Behavior of programs in presence of bugs • High-level language model breaks down • Tuning program performance • Understanding sources of program inefficiency • Implementing system software • Compiler has machine code as target • Operating systems must manage process state CSCE 312

7. Assembly Code Example • Time Stamp Counter • Special 64-bit register in Intel-compatible machines • Incremented every clock cycle • Read with rdtsc instruction • Application • Measure time required by a procedure P • In units of clock cycles • double t; • start_counter(); • P(); • t = get_counter(); • printf("P required %f clock cycles\n", t); CSCE 312

8. Code to Read Counter • Write small amount of assembly code using GCC’s asm facility • Inserts assembly code into machine code generated by compiler static unsigned cyc_hi = 0; static unsigned cyc_lo = 0; /* Set *hi and *lo to the high and low order bits of the cycle counter. */ void access_counter(unsigned *hi, unsigned *lo) { asm("rdtsc; movl %%edx,%0; movl %%eax,%1" : "=r" (*hi), "=r" (*lo) : : "%edx", "%eax"); } CSCE 312

9. Code to Read Counter /* Record the current value of the cycle counter. */ void start_counter() { access_counter(&cyc_hi, &cyc_lo); } /* Number of cycles since the last call to start_counter. */ double get_counter() { unsigned ncyc_hi, ncyc_lo; unsigned hi, lo, borrow; /* Get cycle counter */ access_counter(&ncyc_hi, &ncyc_lo); /* Do double precision subtraction */ lo = ncyc_lo - cyc_lo; borrow = lo > ncyc_lo; hi = ncyc_hi - cyc_hi - borrow; return (double) hi * (1 << 30) * 4 + lo; } CSCE 312

10. Great Reality #3 • Memory Matters • Memory is not unbounded • It must be allocated and managed • Many applications are memory dominated • Memory referencing bugs especially pernicious • Effects are distant in both time and space • Memory performance is not uniform • Cache and virtual memory effects can greatly affect program performance • Adapting program to characteristics of memory system can lead to major speed improvements CSCE 312

11. Memory Referencing Errors • C and C++ do not provide any memory protection • Out of bounds array references • Invalid pointer values • Abuses of malloc/free • Can lead to nasty bugs • Whether or not bug has any effect depends on system and compiler • Action at a distance • Corrupted object logically unrelated to one being accessed • Effect of bug may be first observed long after it is generated • How can I deal with this? • Program in Java, Lisp, or ML • Understand what possible interactions may occur • Use or develop tools to detect referencingerrors • Use debugged library routines CSCE 312

12. Great Reality #4 • There’s more to performance than asymptotic complexity • Constant factors matter too! • Easily see 10:1 performance range depending on how code written • Must optimize at multiple levels: algorithm, data representations, procedures, and loops • Must understand system to optimize performance • How programs compiled and executed • How to measure program performance and identify bottlenecks • How to improve performance without destroying code modularity and generality CSCE 312

13. Great Reality #5 • Computers do more than execute programs • They need to get data in and out • I/O system critical to program reliability and performance • They communicate with each other over networks • Many system-level issues arise in presence of network • Concurrent operations by autonomous processes • Coping with unreliable media • Cross platform compatibility • Complex performance issues CSCE 312

14. Course Overview • Topics: • Theme • Five great realities of computer systems • Computer System Overview • Summary • NOTE: Most slides are from the textbook and the co-author Randal E Bryant of Carnegie Mellon University CSCE 312

15. Terms • Bit, byte, word • KB, MB, GB… • sec, ms, us, ns, ps

16. Hardware Organization CPU Register file ALU PC System bus Memory bus Main memory Bus interface I/O bridge I/O bus Expansion slots for other devices such as network adapters USB controller Graphics adapter Disk controller Mouse Keyboard Display hello executable stored on disk Disk

17. Inside Pentium 4

18. Hardware Organization • CPU: Central Processing Unit • ALU: Arithmetic/Logic Unit • PC: Program Counter • USB: Universal Serial Bus

19. Main Memory • A temporary storage device that holds both a program and the data it manipulates. • Consists of a collection of dynamic random access memory (DRAM) chips. • Logically a linear array of bytes.

20. Processor • The engine that interprets instructions stored in main memory. • At any point in time, the PC points at some machine language instruction in main memory. • A processor repeatedly executes the instruction pointed at by the PC. • A processor operates according to a very simple instruction execution model, defined by its instruction set architecture (ISA).

21. Abstraction • Both hardware and software consists of hierarchical layers (abstraction). • To cope with the complexity of computer systems. • The interface between the hardware and low-level software: Instruction Set Architecture (ISA)

22. ISA • Includes anything programmers need to know to make a binary machine language program work correctly. • Includes instructions, I/O devices, and so on. • Modern ISAs: • 80x86/Pentium, PowerPC, DEC Alpha, MIPS, SPARC, HP, …

23. What is Computer Architecture? Computer Architecture = Instruction Set Architecture + Machine Organization

24. What Is Computer Architecture? Application Operating System Compiler Firmware Instruction Set Architecture Instr. Set Proc. I/O system Datapath & Control Digital Design Circuit Design Layout

25. Register File, ALU • The register file is a small storage device that consists of a collection of word-sized registers, each with its own unique name. • The ALU computes new data and address values (add, subtract, multiply, divide, or, and, xor, etc.)

26. Memory Hierarchy L1 cache holds cache lines retrieved from the L2 cache. L2 cache holds cache lines retrieved from memory. L0: Smaller, faster, and costlier (per byte) storage devices CPU registers hold words retrieved from cache memory. Registers On-chip L1 cache (SRAM) L1: Off-chip L2 cache (SRAM) Main memory holds disk blocks retrieved from local disks. L2: Main memory (DRAM) L3: Larger, slower, and cheaper (per byte) storage devices Local disks hold files retrieved from disks on remote network servers. Local secondary storage (local disks) L4: Remote secondary storage (distributed file systems, Web servers) L5: CSCE 312 26

27. Memory Hierarchy REGISTERS Smaller Faster CACHE MEMORY Slower Larger DISK

28. CPU chip Cache Memory Register file L1 cache (SRAM) ALU Cache bus System bus Memory bus Main memory (DRAM) L2 cache (SRAM) Bus interface Memory bridge CSCE 312 28

29. Memory Hierarchy • Storage at one level serves as a cache for storage at the next lower level. • The register file is a cache for the L1 cache, L1 is a cache for L2, and so forth.

30. Operating System • A layer of software interposed between the application program and the hardware. • All attempts by an application program to manipulate the hardware must go through the OS. • Two primary purposes of OS • Protect HW from misuse by runaway applications. • Provide applications with simple and uniform mechanisms for manipulating complicated and often wildly different low-level hardware devices.

31. Processes OS abstracts HW Application programs Software Operating system Virtual memory Processor Main memory I/O devices Hardware Files Processor Main memory I/O devices CSCE 312 31

32. Process • The operating system’s abstraction for a running program. • Multiple processes can run concurrently on the same machine. • Traditional systems (uniprocessor) can execute only one program at a time. • Multicore processors can execute several programs simultaneously.

33. Process • In either case, a single CPU can execute multiple processes concurrently by having the processor switch among them. => Context switch • The OS keeps track of all the state information (context) that the process needs in order to run. • Context: PC value, register file values, …

34. Process • At any point in time, a uniprocessor system can only execute the code for a single process. • When the OS decides to transfer control from the current process to another process, it performs a context switch by saving the context of the current process, restoring the context of the new process, and passing control to the new process.

35. Thread • A process can actually consists of multiple execution units, called threads, each running in the context of the process and sharing the same code and global data.

36. Virtual Memory • An abstraction that provides each process with the illusion that it has exclusive use of the main memory. • Each process has the same uniform view of memory, called virtual address space.

37. Memory Performance Example Implementations of Matrix Multiplication Multiple ways to nest loops /* ijk */ for (i=0; i<n; i++) { for (j=0; j<n; j++) { sum = 0.0; for (k=0; k<n; k++) sum += a[i][k] * b[k][j]; c[i][j] = sum; } } /* jik */ for (j=0; j<n; j++) { for (i=0; i<n; i++) { sum = 0.0; for (k=0; k<n; k++) sum += a[i][k] * b[k][j]; c[i][j] = sum } } CSCE 312 37

38. Matmult Performance(Alpha 21164) 160 140 120 ijk 100 ikj jik 80 60 40 20 0 matrix size (n) Too big for L1 Cache Too big for L2 Cache jki kij kji CSCE 312 38

39. Blocked matmult Performance (Alpha 21164) 160 140 120 100 bijk bikj 80 ijk ikj 60 40 20 0 50 75 100 125 150 175 200 225 250 275 300 325 350 375 400 425 450 475 500 matrix size (n) CSCE 312 39

40. Course Perspective Most Systems Courses are Builder-Centric Computer Architecture Design pipelined processor in Verilog Operating Systems Implement large portions of operating system Compilers Write compiler for simple language Networking Implement and simulate network protocols CSCE 312 40

41. Course Perspective (Cont.) Our Course is Programmer-Centric Purpose is to show how by knowing more about the underlying system, one can be more effective as a programmer Enable you to Write programs that are more reliable and efficient Incorporate features that require hooks into OS E.g., concurrency, signal handlers Not just a course for dedicated hackers We bring out the hidden hacker in everyone Cover material in this course that you won’t see elsewhere CSCE 312 41

42. Summary The computer system is more than just hardware! We need to understand both the hardware and system interfaces to properly use a computer We shall focus on more details to such concepts through out this course. CSCE 312 42