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TMS320C5000 ™ : The World’s Most Popular and Power Efficient DSPs

TMS320C5000 ™ : The World’s Most Popular and Power Efficient DSPs. TI Extends World’s Most Popular DSP Platform. C55x TM DSP Multicore. OMAP TM C55x+ARM9. TNET3010 4800 MIPS. OMAP5910 C55x+ARM9. C5420 200 MIPS. C55x TM DSP. C5441 532 MIPS. C5421 200 MIPS. C5471 C54x TM +ARM7.

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TMS320C5000 ™ : The World’s Most Popular and Power Efficient DSPs

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  1. TMS320C5000™: The World’s Most Popular and Power Efficient DSPs

  2. TI Extends World’s Most Popular DSP Platform C55xTM DSPMulticore OMAPTMC55x+ARM9 TNET30104800 MIPS OMAP5910C55x+ARM9 C5420200 MIPS C55xTMDSP C5441532 MIPS C5421200 MIPS C5471C54xTM+ARM7 C5510320-400MIPS C5470C54x+ARM7 C5509288-400MIPS C5416120-160MIPS C5410100-160MIPS C540980-160 MIPS C5402100-160MIPS C5407120 MIPS C5404120 MIPS C540150 MIPS Code Compatible In Silicon Announcement Roadmap Power Efficiency/System Density C5502400-600 MIPS C5501600 MIPS Feature Integration

  3. ‘C5000 DSP Market Segments TargetedOver 500 million C5000 DSPs shipped in more than 1000 different applications Telecom • T1 – E1 PABX • VoIP, VoATM, VoDSL • Access gateways • IP-Phones, Public phones • Vsat systems • Fiber Optic test equipments • Switches • ADSL, Modems, Fax • P.O.S. • 80% of VoIP Gateway market • Used in 8 of the top 10 wireless infrastructures Mfrs. VoIP Networking Terminal Modems Consumer • Multimedia Jukebox • Digital still camera • Internet Audio • Web phones • STB • Gaming • Alarm systems • Used in 7 of top 8 digital still Camera Mfrs. • Used in 8 of top 10 internet consumer electronic Mfrs. Audio Video Imaging Internet appliances End Equipments Emerging • Telematics, Hands-Free Kits • Fingerprint recognition • Tire pressure monitoring • Medical equipments • Power line comms, GPS • Access gate, Secured POS • E-commerce • D-Ins in 4 of top 5 European Hands – Free Kit mfrs. • Over 30 D-Ins in Biometrics Automotive Biometrics Voice recognition

  4. C54x

  5. Program/Data ROM 16K Words JTAG Test/EmulationControl Program/Data SRAM 128K Words D(15-0) Program/Data Buses Muxed GP I/O A(23-0) Ch 0 MAC ALU DMA Timer Ch 1 17 x 17 MPY 40-Bit ALU 8/16-bit Host PortInterface (HPI) CMPS Operator(VITERBI) 40-Bit Adder Ch 2 RND, SAT Ch 3 EXP Encoder Multichannel BufferedSerial Port (McBSP) Peripheral Bus Shifter Accumulators Ch 4 Multichannel BufferedSerial Port (McBSP) 40-Bit Barrel(-16, 31) 40-Bit ACC A Ch 5 40-Bit ACC B Multichannel BufferedSerial Port (McBSP) Addressing Unit 8 Auxiliary Registers PLL Clock Generator 2 Addressing Units S/W WaitstateGenerator Power Management ’C5416: 60% Core Performance Boost Vs C’5409 • High Performance • 160 MIPS • 128K words SRAM • 16K words ROM • 3 McBSPs • 6-channel DMA • 8/16-bit HPI • Extended Program Addressing • Low Power • 1.5-V core • 90 mW active @ 160 MIPS • Small Size • 144 TQFP • 144 microStar BGA (12 x 12 mm)

  6. ‘C5420: Minimize mW & in2 per Channel 100K Words RAM JTAG Test/EmulationControl Program/Data Buses Multichannel BufferedSerial Port (McBSP) DMA MAC ALU Multichannel BufferedSerial Port (McBSP) 17 x 17 MPY 40-Bit ALU Multichannel BufferedSerial Port (McBSP) CMPS Operator(VITERBI) 40-Bit Adder Peripheral Bus RND, SAT EXP Encoder Timer Shifter Accumulators Power Management GP I/O 40-Bit Barrel(-16, 31) 40-Bit ACC A 40-Bit ACC B PLL Clock Generator Addressing Unit Ch 0 Ch 0 8 Auxiliary Registers 16-Bit Host PortInterface (HPI) 2 Addressing Units Ch 1 Ch 1 FIFO Interface Ch 2 Ch 2 MAC ALU Ch 3 Ch 3 17 x 17 MPY 40-Bit ALU 16-Bit Host PortInterface (HPI) 40-Bit Adder CMPS Operator(VITERBI) DMA Ch 4 Ch 4 Multichannel BufferedSerial Port (McBSP) RND, SAT EXP Encoder Shifter Accumulators Ch 5 Ch 5 Multichannel BufferedSerial Port (McBSP) Power Management 40-Bit Barrel(-16, 31) 40-Bit ACC A Multichannel BufferedSerial Port (McBSP) Peripheral Bus 40-Bit ACC B Addressing Unit Timer 8 Auxiliary Registers 2 Addressing Units GP I/O PLL Clock Generator JTAG Test/EmulationControl Program/Data Buses 100K Words RAM • Performance • 200 MIPS for • 200K words SRAM (3.2 Mbits) • 6 McBSPs • 12-channels DMA • 16-bit HPI • Low Power • 1.8-V core • 266 mW active power • Low power per channel • Small Size • 144-pin TQFP • 144 microStar BGA (12 x 12 mm)

  7. TMS320VC5421: Balances Channel Density for Strict Board-Level Power Budgets • Performance for increased density and flexibility • 200 MIPS • 256K words SRAM (4.1 Mbits) • 6 McBSPs with 128-channel selection • 12-channels DMA w/ external transfer (256K word) • 16-bit HPI • Low power to meet board-level power budgets • 1.8-V core • 160 mW active power @ 200 MIPS • Small size for maxi-mizing available space • 144-pin TQFP • 144 microStar™ BGA (12 x 12 mm)

  8. ‘C5441: Performance for the Ultimate in Density and Flexibility • Performance: • 133 MHz per core (532 MIPS) • 640K words SRAM (10.2 Mbits) • 4 McBSPs plus 2 shared • 16-bit HPI • Ultra-low power/channel • 1.5-V core • 550 mW active power @ 532 MIPS • 0.15 m process technology • Small size • 176 TQFP • 179 microStar™ BGA (12 x 12 mm)

  9. C54CST DSP Solution • What is C54CST? • TMS320C54xTM DSP with the following ROM contents: • 14 Client Side Telephony Algorithms supporting TI’s DSP Algorithm Standard • eXpress DSP compliant DSP/BIOS Telephony Framework • C54x Hardware Specific Bootloader • iAppliance / gateways • Postal scale / metering • Industrial measurement systems • Voice / Data Access Points • Instrumentation • Building controls • Medical monitoring / telephony • Digital answering machine (DTAD) • Remote data collection Possible Applications: • Point-of-sale outlets and kiosks • Set-top boxes • Credit card and check verification systems • Utility meters • Security systems • ATM terminals • Industrial and medical monitoring systems • Payphones • Voice recorders Note: C54CST memory size is 16K words of RAM and 64K words of ROM. Software algorithms and framework developed by Spirit Corporation

  10. Ch 0 Ch 1 Ch 2 Ch 3 Ch 4 Ch 5 C54CST DSP Product Summary • Features • Up to 120 MHz Performance • 16K words SRAM • 64K words ROM • 2 McBSPs (full 128-ch) • 6-channel DMA • 8/16-bit HPI • UART • System Side DAA (operates at 59 Mhz or 118 Mhz) • 23 GPIO Pins (Mux’d) • Power • 25mW typical power • 1.5-V core (3.3V I/O; 5V for DAA) • Three power-management modes • Package • 144-pin TQFP • 144-pin microStar™ BGA (12 x 12mm) • Footprint compatible w/ 5402 Program/Data ROM 64K Words JTAG Test/EmulationControl Program/Data SRAM 16K Words D(15-0) Program/Data Buses 23 GP I/O(Mux’d) A(22-0) MAC ALU DMA Timer 17 x 17 MPY 40-Bit ALU PLL Clock Generator CMPS Operator(VITERBI) 40-Bit Adder RND, SAT EXP Encoder Multichannel BufferedSerial Port (McBSP) Shifter Accumulators Peripheral Bus Multichannel BufferedSerial Port (McBSP) 40-Bit Barrel(-16, 31) 40-Bit ACC A 40-Bit ACC B UART Addressing Unit 8 Auxiliary Registers 8/16-bit Host PortInterface (HPI) 2 Addressing Units S/W WaitstateGenerator Power Management McBSP ->DAA

  11. C54V90 Modem Chipset • What is? • TMS320C54xTM DSP with a highly integrated two-chip V.90 embedded modem chipset: • • Supports V.90 and all prior ITU data and fax modes • • Ultra-low power consumption • • Parallel or serial interface • • Works with any OS – modem is host independent Possible Applications: • Internet Appliances • Set-Top Boxes (STBs) • Gaming Consoles • Digital Cameras • Digital Music Players • Electronic Books (eBooks) • Personal Digital Assistants (PDAs) • Home Networking, Etc.

  12. Ch 0 Ch 1 Ch 2 Ch 3 Ch 4 Ch 5 C54V90 DSP Program/Data ROM 128K Words JTAG Test/EmulationControl • Features • 120 Mhz Performance • 40K words SRAM • 128K words ROM • 2 McBSPs (full 128-ch) • 6-channel DMA • 8/16-bit HPI • UART • System Side DAA • 23 GPIO Pins (Mux’d) • Power • 25mW for modem solution • 1.5-V core (3.3V I/O; 5V for DAA) • Three power-management modes • Package • 144-pin TQFP • 144-pin microStar™ BGA (12 x 12mm) • Footprint compatible w/ 5402 Program/Data SRAM 40K Words D(15-0) Program/Data Buses 23 GP I/O(Mux’d) A(22-0) MAC ALU DMA Timer 17 x 17 MPY 40-Bit ALU PLL Clock Generator CMPS Operator(VITERBI) 40-Bit Adder RND, SAT EXP Encoder Multichannel BufferedSerial Port (McBSP) Shifter Accumulators Peripheral Bus Multichannel BufferedSerial Port (McBSP) 40-Bit Barrel(-16, 31) 40-Bit ACC A 40-Bit ACC B UART Addressing Unit 8 Auxiliary Registers 8/16-bit Host PortInterface (HPI) 2 Addressing Units S/W WaitstateGenerator Power Management System Side DAA

  13. C55x

  14. C55x DSPThe Solution for Portable Applications Power-Efficient, High-performance and Programmable Solutions for Hand-held Applications • C5510 and C5509 Start Now! Software Libraries, Proven DevelopmentEnvironment, and EVMs Enable Rapid designof imaging and video applications and projects

  15. MPEG-4 Video Codec, QCIF format @ 30 fps DCT 10 % of total cycles iDCT 20 % of total cycles Motion Estimation 35 % of total cycles Pixel Interpolation 15 % of total cycles A Closer Look at MPEG-4The Emerging Standard for Portable Video • These functions contribute to 80% of the computational requirement in an unassisted system • With these targeted hardware extensions, C55x has enhanced video performance and maintains flexibility for programming video parameters

  16. ‘C5501: Industry’s First 600 MIPS (300 MHz) DSP at $5 On-chip memory: 16KW DARAM, 16KW ROM 16-bit external memory interface (EMIF) 16 KByte instruction-cache 8-bit enhanced host port interface Extended operating temperature - 40º to 85º C @ 300 MHz 6-channel direct memory access (DMA) 2 McBSPs I2C multi-master and slave interface Hardware UART Programmable phase-locked loop (APLL) with on-chip oscillator 3 timers: 2 general purpose, 1 programmable watchdog 76 GPIO, 8 dedicated 176-pin LQFP, 176-pin µ*BGA Scheduled to sample in 3Q03

  17. 16 KW ROM 32 KW DARAM Program 32 bits 32 bit-EMIF Program 32 bits ‘C5502 @ 600 MIPS (300 MHz) On-chip memory: 32KW DARAM, 16KW ROM 32-bit external memory interface (EMIF) Data Read (3-16 bit) 16 KByte instruction cache Data Write (2-16 bit) Peripherals 16-bit/8-bit enhanced host port interface 6 channel DMA Extended operating temperature - 40º to 85º C @ 300 MHz C55xTM DSP Core 3 McBSPs 6-channel direct memory access (DMA) IdleDomainRegister Advanced Power Mgmt Instruction Buffer Unit Watchdog 3 McBSPs Advanced Emulation I2C Interface 40-bitALU I2C multi-master and slave interface I-Cache Hardware UART 16-bitALU Dual Mac H/WUART Peripherals Bus Programmable phase-locked loop (APLL) with on-chip oscillator Registers Enhanced HPI Accumulators 3 timers: 2 general purpose, 1 programmable watchdog AddressUnits GPIO Barrel Shifter 2 Timers 76 GPIO, 8 dedicated ClockGenerator 176-pin LQFP, 176-pin µ*BGA TMS320C5502 @ 300 MHz

  18. ‘C5509 - The Portable and Connected DSP Data Read (3-16 bit) Data Write (2-16 bit) USB C55xTM DSP CORE Program 32 bits IdleDomainRegister Advanced Power Mgmt Instruction Buffer Unit 10-bitADC Advanced Emulation MMC/SD 40-bitALU RTC MemStick Dual Mac 16-bit ALU Program 32 bits Reg. EHPI Accumulators AddrUnits 3 McBSPs Barrel Shifter Watchdog 6 channel DMA 32 KW ROM 32 KW DARAM 96 KW SARAM • USB 2.0 port • 10-bit 500us ADC for keypad, button and battery monitoring functions • Real-Time Clock w/ 32KHz crystal input, separate power Peripherals • Multimedia Card/Secure Digital (MMC/SD) Serial Ports • Memory Stick (MS) Serial Ports • 3 McBSPs 16 bit-EMIF • 16-bit EMIF • I2C multi-master and slave interface Peripherals Bus • 3 timers: 2 general purpose, 1 watchdog • 36 GPIO, 7/8 Dedicated I2CInterface • 16-bit HPI muxed w/address bus • 64-bit unique device ID, secure ROM, JTAG w/ disconnect option for security Peripherals Bus • 128K on-chip memory: 32KW DARAM, 96Kw SARAM 2 Timers 8 GPIO DPLL X4 PLL • 32KW ROM TMS320C5509 @ 144 or 200 MHz

  19. Six-channel • DMA ‘C5510: The high runner ‘C55x DSP VC5510 Device Specific Information • 160 KW SRAM • 16 KW ROM • On-Chip Memory • I-Cache • 24 KByte Cache • 3 Multi-channel Buffered Serial Ports • 128 Channels Each • 16-bit • Enhanced HPI • Supports Cheaper & Faster Memories • External Memory Interface (EMIF) • Advanced Emulation • Easier Debug • Connect Peripherals • directly to the DSP • 8 GP I/O Lines • Package • 240 Ball, 15x15u*BGA

  20. Advanced I-Cache Architecture Allows More Memory at Low Cost • More flexibility • More external memory options • Reduced latencies “When we ran our AudioCodes G.723.1 algorithm using the C55x I-Cache, we saw only a 5% degradation vs. local memory performance.” — Oren Klimker, DSP System Software Team Leader

  21. Superior ‘C55x C Compiler Technology Delivers Higher Performance and More Memory C55x ~ 40% fewer cycles than Competitor Competitor code size is ~3x that of C55x Code Size Cycles 70,000 700,000 60,000 600,000 50,000 500,000 40,000 400,000 30,000 300,000 20,000 200,000 10,000 100,000 0 0 Reed- GSM-EFR Reed- GSM-EFR Solomon Solomon C55xTM (ver 2.5) Competitor Notes: 1. Lower is better 2. Cycle count shown is average per frame - number of frames is 10 for RS, 5 for GSM-EFR

  22. TI Gives 45% Lower Power Dissipation at even Higher Performance C55x-300MHz 45% lower power than Competitor @ 100MHz** C55x 60% lower power* 1200 700 1000 600 800 500 mW 600 400 mW C5502 400 300 200 200 100 0 250 100 150 200 300 0 MHz Deep Sleep Active Sleep Full-On Competitor C5502 Sim Competitor-200 Competitor-100 Competitor-300 * 256 sample 8-tap FIR filter C55xTM-300 C55xTM-100 C55xTM-200 ** NOP loop • Test Platforms • Competitor’s equivalent device • C55xTM-300MHz estimates based on C5502-300MHz simulations

  23. TI Provides 8X the Battery Life % Used RadioMode DSP Mode Avg. Peak Power Power Consumption AA AA AA AA 8X Battery Life Example: Municipality Radio x = C55x Comm/Transmit Normal 16.8 mW 67.2(mW 25% 2.52 mW 4.2 mW 60% Scan Idle2 0.0165 mW 0.11 mW 15% Standby Idle3 19.3365 mW TOTAL Competitor Comm/Transmit Full On 130.1 mW 520.4 mW 25% Scan 22.8 mW 38.0 mW 60% Active Standby 0.846m W 5.64 mW 15% Deep Sleep 153.746 mW TOTAL TOTAL 2850mAH C55x 24 days Competitor 3 days Source: Texas Instruments

  24. DSP Family Overview • DSP families overview and selection guide. • TMS320C54x Family overview. • TMS320C55x Family overview.

  25. CodeComposerStudio DSP/BIOS TI DSPThird-Party Network TMS320TMDSPAlgorithmStandard eXpressDSPTM Software Technology Accelerates Customer’s Product Development Powerful, integrated development tools Scalable, real-time software foundation • C55x compiler optimizes greater than 70% of hand-coded assembly • More than 10,000 C5000TM DSP Code Composer StudioTM developers today • Pre-emptive scheduler • Real-time analysis • Very low overhead Reusable, modular software and support Standards for application interoperability • 400+ third parties • Online access to third party products via TI’s web site • More than 300 eXpressDSPTM-compliant algorithms available

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