1 / 13

Student: Peter Doyle Supervisor: Prof. Gerard Hurley Ignacio Lope

Design, control and implementation of inverters topologies applied to domestic induction heating. Student: Peter Doyle Supervisor: Prof. Gerard Hurley Ignacio Lope. Final Year Project Presentation. Topics to be discussed:.

jewel
Download Presentation

Student: Peter Doyle Supervisor: Prof. Gerard Hurley Ignacio Lope

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Design, control and implementation of inverters topologies applied to domestic induction heating Student: Peter Doyle Supervisor: Prof. Gerard Hurley Ignacio Lope Final Year Project Presentation

  2. Topics to be discussed: • Function of Domestic Induction Heating Appliance • Circuit Design and Analysis • Digital Control • Achieving Optimal Power Output • Circuit Simulation • Experimental Results • Tasks to be completed

  3. Vdc V Vac I Iac Function of Domestic Induction Heating Appliances f = 20 kHz – 100 kHz f = 50Hz DC Bus

  4. Circuit Design and Analysis Circuit Objectives: • Maintain Zero voltage switching • Generate a AC voltage • Be able to produce a variable frequency 30kHz - 70kHz to control Power Output

  5. Function of the Half-Bridge

  6. Digital Control • The Half-Bridge is controlled by an FPGA • The variable switching frequency is generated by the FPGA from 70kHz - 30kHz depending on the required power output. • This signal is sent to the Signal Driver to improve the strength of the signal at its source before it is transmitted to the transistors on the PCB. The Signal Driver has the logic inverse.

  7. Digital Control • After the FPGA was programmed it was discovered that when the FPGA is turned on the output of the pins went high for 1.8sec. • The Solution was to add a relay circuit to isolate the PCB from mains voltage until intentionally switched on.

  8. Achieving Optimal Power Output • As shown in the graph below the resonant frequency, fr, (freq. at max power output) varies depending on the value of the resonant capacitor, Cr. • The Switching frequency, fsw, must be greater than the resonant frequency to ensure Zero voltage switching.

  9. Circuit Simulation

  10. Experimental Results

  11. Experimental Results Load Current @ 35kHz Load Current @ 70khz

  12. Tasks to be Completed: • Design a compete simulation of the Half-Bridge circuit including, filters, mains voltage rectification, switching topography and power output. • Design of the printed circuit board (PCB) including choke, signal drivers, half bridge and common mode filter. • Justify the selection of all component values. • Test the half bridge in small signal DC conditions. • Order PCB. • Test under mains voltage conditions and demonstrate using existing control circuitry.

  13. Questions?

More Related