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Data Hazards and Stalls

Data Hazards and Stalls. Data hazards and forwarding Data Hazards and Stalls. An Example. Assuming that register R2 = 10 initially. And the sub instruction will result in R2 = -20. Pipelined dependencies in a five instruction sequence using simplified datapaths to show the dependencies.

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Data Hazards and Stalls

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  1. Data Hazards and Stalls • Data hazards and forwarding • Data Hazards and Stalls \course\cpeg323-05F\Topic6c-323.ppt

  2. An Example Assuming that register R2 = 10 initially. And the sub instruction will result in R2 = -20. \course\cpeg323-05F\Topic6c-323.ppt

  3. Pipelined dependencies in a five instruction sequence using simplified datapaths to show the dependencies. Note: only add and sw get the right value R2 = - 20 \course\cpeg323-05F\Topic6c-323.ppt

  4. An Example (cont’d) Hazard condition (between sub and and at the indicated stages): EX/MEM.RegisterRd = ID/EX.RegisterRs = $2 General 1a. EX/MEM.RegisterRd = ID/EX.RegisterRs 1b. EX/MEM.RegisterRd = ID/EX.RegisterRt 2a. MEM/WB.RegisterRd = ID/EX.RegisterRs 2b. MEM/WB.RegisterRd = ID/EX.RegisterRt Question: can you identify which of the 4 conditions Here captures the hazards condition between sub and or ? \course\cpeg323-05F\Topic6c-323.ppt

  5. Forwarding/Bypassing • ALUinputs can also from pipeline registers • Extra multiplexors • Hazard detection units \course\cpeg323-05F\Topic6c-323.ppt

  6. The dependencies between the pipeline registers move forward in time, so it is possible to supply the inputs to the ALU needed by the and instruction and or instruction by forwarding the results found in the pipeline registers rather than stall. \course\cpeg323-05F\Topic6c-323.ppt

  7. a. No forwarding the ALU and pipeline register before adding forwarding. \course\cpeg323-05F\Topic6c-323.ppt

  8. b. With forwarding Forwarding control and the multiplexors are added \course\cpeg323-05F\Topic6c-323.ppt

  9. The control values for the forwarding multiplexors. \course\cpeg323-05F\Topic6c-323.ppt

  10. Forwarding Conditions 1. EX hazard: if(EX/MEM.RegWrite and (EX/MEM.RegisterRd =/= 0) and (EX/MEM.RegisterRd = ID/EX.RegisterRs)) ForwardA = 10 if (EX/MEM.RegWrite and (EX/MEM.RegisterRd =/= 0) and (EX/MEM.RegisterRd = ID/EX.RegisterRt)) ForwardB = 10 \course\cpeg323-05F\Topic6c-323.ppt

  11. Con’d 2. MEM hazard: if(MEM/WB.RegWrite and (MEM/WB.RegisterRd =/= 0) and (MEM/WB.RegisterRd = ID/EX.RegisterRs)) ForwardA = 01 if(MEM/WB.RegWrite and (MEM/WB.RegisterRd =/= 0) and (MEM/WB.RegisterRd = ID/EX.RegisterRt)) ForwardB = 01 \course\cpeg323-05F\Topic6c-323.ppt

  12. Note: here both EX and MEM stages may have the exact hazard conditions. What should we do ? Priority in Forwarding Add $1, $1, $2 Add $1, $1, $3 Add $1, $1, $4 …. \course\cpeg323-05F\Topic6c-323.ppt

  13. Note: When both EX and MEM stages may have the exact hazard conditions. Priority in Forwarding If (MEM/WB.RegWrite and (MEM/WB.RegisterRd =/= 0) and (EX/MEM.RegisterRd =/= ID/EX.RegisterRs) and (MEM/WB.RegisterRd = ID/EX.RegisterRs)) Forward A = 01 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd =/= 0) and (EX/MEM.RegisterRd =/= ID/EX.RegisterRt) and (MEM/WB.RegisterRd = ID/EX.RegisterRt)) ForwardB = 01 \course\cpeg323-05F\Topic6c-323.ppt

  14. The datapath modified to resolve hazards via forwarding. \course\cpeg323-05F\Topic6c-323.ppt

  15. The Snapshots of Our Example Through Forwarding \course\cpeg323-05F\Topic6c-323.ppt

  16. Clock cycles 3 of the instruction sequence. \course\cpeg323-05F\Topic6c-323.ppt

  17. add $9, $4, $2 or $4, $4, $2 and $4, $2, $5 sub $2…… before <1> Clock cycles 4 of the instruction sequence. \course\cpeg323-05F\Topic6c-323.ppt

  18. Clock cycles 5 of the instruction sequence. \course\cpeg323-05F\Topic6c-323.ppt

  19. after <2> after <1> add $9, $4, $2 or $4…… and $4…... Clock cycles 6 of the instruction sequence. \course\cpeg323-05F\Topic6c-323.ppt

  20. Hazards and Stalls \course\cpeg323-05F\Topic6c-323.ppt

  21. A pipelined sequence of instructions. \course\cpeg323-05F\Topic6c-323.ppt

  22. The way stalls are really inserted into the pipeline. \course\cpeg323-05F\Topic6c-323.ppt

  23. Forwarding with Load and Stores • The problem • The solution \course\cpeg323-05F\Topic6c-323.ppt

  24. A Hazard Detection Unit In the ID stage, the following should be checked by the hazard detection unit, so it can insert the stall between aloadand its use. if (ID/EX.MemRead and ((ID/EX.RegisterRt = IF/ID.RegisterRs) or (ID/EX.RegisterRt = IF/ID.RegisterRt)) stall the pipeline \course\cpeg323-05F\Topic6c-323.ppt

  25. Pipelined control overview, showing the two multiplexors for forwarding, the hazard detection unit, and the forwarding unit. \course\cpeg323-05F\Topic6c-323.ppt

  26. “Snapshots” of the running example through the pipeline \course\cpeg323-05F\Topic6c-323.ppt

  27. Clock cycles 2 of the instruction sequence in the example. \course\cpeg323-05F\Topic6c-323.ppt

  28. Clock cycles 3 of the instruction sequence in the example. \course\cpeg323-05F\Topic6c-323.ppt

  29. Clock cycles 4 the instruction sequence in the example. \course\cpeg323-05F\Topic6c-323.ppt

  30. Clock cycles 5 of the instruction sequence in the example. \course\cpeg323-05F\Topic6c-323.ppt

  31. Clock cycles 6 of the instruction sequence in the example. \course\cpeg323-05F\Topic6c-323.ppt

  32. Clock cycles 7 of the instruction sequence in the example. (note the forwarding of r4) \course\cpeg323-05F\Topic6c-323.ppt

  33. Branch Hazards and Handling • Branch hazards • Branch hazard handling methods • Static • Dynamic \course\cpeg323-05F\Topic6c-323.ppt

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