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Amplifier Design Blog by Kim Eccleston PowerPoint Presentation
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Amplifier Design Blog by Kim Eccleston

Amplifier Design Blog by Kim Eccleston

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Amplifier Design Blog by Kim Eccleston

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  1. Amplifier Design Blogby Kim Eccleston • Use this blog may give you an idea of how you might document your design as a “blog”. • According to Wikipedia, a blog is meant to be on-line. So this offline blog is a first. • This is NOT a template so don’t think your blog has to look identical. • Be original but the blog must be a complete chronologically ordered record of what you did. • USE SLIDE NUMBERING • This “blog” approach will allow you to document as you go. You should not need an all-nighter on the night before it is due. • This document also contains advice and suggestions which would normally not appear in documentation. • Annotate screen captures with text boxes and graphical symbols as I have done. Usecolourtomake themloud! • Butnopointusingdifficulttoread or sillyfonts. • Make sure that figures that you copy and paste are legible. You may be able to use a smaller font than I have used. (I used large font in anticipation of use in lectures.) • Be careful with choice of text colours and backgrounds. eg. Do not use grey text on white background, or black text on a dark blue background. 1

  2. Specs: Centre frequency: 1.5 GHz Bandwidth: 5 % - 20 % Transistor: BFR92A Si BJT Supply voltage: 12 V Matching: Input and Output PCB: FR4 1.6 mm SMT case: 0805 Passband defined by gain within 1 dB of drop centre frequency value, and input and output reflection coefficient less than -10 dB. 2

  3. Microstrip Calculations This is how I documented my microstrip calculations … Calculations show that a 50 ohm microstrip is 3.07 mm wide Say 3.1 mm Wavelength = 109.4 m Slides may need a suitable title reflecting its content. Leave no doubt in the reader of what the slide is trying to portray. Definitely number your slides!!! 3

  4. Slide Title ??!! I used these graphs from the capacitor data sheet to useful data … But you should state something “Based on the following graphs from the so-and-so data sheet (give details of reference), the value of …. will be taken as …. ”. You would of course have a slide title. 4

  5. Slide Title ??!! Data sheet would indicate that gain increases with collector bias current … Use a bias of 12 mA as there is no significant benefit to go above this. With a 12 V supply, a sensible VCE bias would be 6 V. 5

  6. Slide Title ??!! • It is desirable to have emitter degeneration at low frequencies to prevent low frequency oscillation and ensure bias stability • We can try 100 ohm – but this can be changed if necessary • Hence for a 12 mA collector bias current, the voltage drop across Re will be 1.2 V and means the Rc will need to be 400 ohm – say 390 ohm. • You should include all YOUR bias circuit calculations. • An emitter bypass capacitor will be required to significantly reduce emitter degeneration at 1.5 GHz (otherwise the gain will be low). • The emitter bypass capacitor, Ce, needs to be large. ie order 100 pF. But you may need to experiment with its value. I tried 330 pF. • To perform RF design calculations we need 2-port S-parameters of the active device. • The active device is not simply the BFR92A but includes emitter degeneration, emitter bypass and the associated layout effects. • That is we set the emitter degeneration and bypass in stone prior to the RF design calculations. 6

  7. BIASED Active 2-port simulation BIASTEE elements is transparent to AC signals between ports marked “RF” Ic = 12.5 mA VCE = 5.8 V Re Rc R2 Ce R1 Rc and R1 and R2 will be included in the final design 7

  8. Sometimes you may need to magnify the image to make important detail legible … You can also increase text font size etc. Options -> Environment Options … 8

  9. Corresponding layout Port 1 BFR92A Port 2 Re Ce I think there is enough room for solder joints There is a measuring tape in MWO and this is useful to check clearances etc. Note that R1 and R2 do not show in the layout at this stage. 9

  10. Based upon K, magnitudes of S11 and S22, we can say that that the 2-port is unconditionally stable above 320 MHz So simultaneous conjugate matching can be used Maximum gain that we can get at 1.5 GHz is 7.6 dB We don’t have to have unconditional stability at all frequencies – just around 1.5 GHz so that we can match input and output at 1.5 GHz. 10

  11. Slide Title ??!! I documented these results since subsequent calculations are reliant on the data extracted from these. You should give this slide a title reflecting its contents. 11

  12. Summarise important results … S-parameters of 2-port (not BFR92A) at 1.5 GHz which will be used in the design calculations …. Using equations 11.40a and 11.40b in Pozar the values of ΓS and ΓL to achieve simultaneous conjugate matching are: ΓS = 0.15 /-156°ΓL = 0.65 / 30° See calculations on the next page. So we can now take out the Smith charts. Note charts not chart!!! We want to transform a 50 Ωgenerator to ΓS and the 50 Ω load to ΓL. As both the input and output are conjugately matched, the equivalent problem is to design matching networks to match Γ1 = ΓS* = 0.15 /156° and Γ2 = ΓL* = 0.65 /-30° to 50 Ω. 12

  13. Slide Title ??!! Be aware that there will be round-off error but hopefully this will not significantly impact on the amplifier performance. It is quite acceptable to scan in calculations, diagrams etc. 13

  14. Γ2 = ΓL* = 0.65 /-30° yn= 1 + j 1.7 ystub = - j 1.7 d = 0.181 - 0.042 λ = 0.139 λ l = 0.335 - 0.25 λ = 0.085 λ Tip of the day: Buy a decent compass. 14

  15. Γ1 = ΓS* = 0.15 /156° Note that I used ink on the Smith chart before scanning. Pencil marks are difficult to see at the best of times – especially when scanned. Use a thick felt-tip pen for text. Do this in the exam! yn= 1 + j 0.32 ystub = - j 0.32 d = 0.217 + 0.139 λ = 0.356 λ l = 0.25 – 0.049 λ = 0.201 λ 15

  16. Be aware that the above design method is graphical in nature and this introduces errors. • Now we could at this stage put the whole amplifier together in its final form microstrips and all. And you hope for the best that it works. And you may be lucky and it does. More likely it won’t for various reasons including careless errors or assumptions not applicable in practice. • As there are many sources of error, you need to have a systematic method taking it step by step so that you can identify and locate problems as they arise • For example, we could implement the matching networks initially with ideal lines just to confirm our calculations and then implement with microstrip and then adding discontinuities and real components. 16

  17. Using Ideal TLs … ΓS plane ΓL plane Seems that ΓS and ΓL are reasonably accurate. Remember: there are graphical errors when using the Smith chart. ΓS ΓL 17 Port 2 provides the 50 ohm termination (amplifier generator or load).

  18. This is to check that the design calculations for simultaneous conjugate match are correct. But remember there will be graphical errors introduced when using the Smith chart. Γ1 plane Γ2 plane Γ1≈ ΓS* approx due to graphical error Γ2= ΓL* (very close) Be careful. Do not mix up ports of a 2-port. Γ1 ΓL ΓS Γ2 18 I am reasonably confident that the design calculations have been properly done and we can proceed to microstrip implementation.

  19. This confirms that the amplifier at least works using ideal transmission lines and ideal bias feeding networks. Input and output decoupling can be used to lower gain below the centre frequency. 19

  20. Ideal TLs are replaced with microstrips … All is well ΓS ΓL 20 Port 2 provides the 50 ohm termination (amplifier generator or load).

  21. This is where we add the T-junction discontinuity model … I made the reasonable assumption “d” is effectively from a central point within the tee to the port. I shortened the microstrip by 1.55 mm. Clearly the effect of the tee is more complicated. This would be a good point to do some fine tuning. ΓS ΓL 21

  22. This is the result after fine tuning. Note – fine tuning – not gross tuning!! The later would have implied incorrect calculations. ΓS ΓL 22 So I am reasonably confident that I can now begin to put the amplifier together.

  23. Just to note that there is now a layout associated with each matching network. You will need to place the layout elements in the correct position. ΓS ΓL These layouts are approximately at the same scale. Question: Do the 5 mm ustrips have an electrical function? ΓS ΓL 23

  24. This confirms that the amplifier at least works using the microstrip matching networks and ideal bias feeding networks. The gain lowers due to losses in the PCB material. The response is otherwise similar to when ideal lines are used. 24

  25. This shows what happens when the microstrip loss tangent is momentarily set to zero … the gain at 1.5 GHz is close to that using ideal lines. We could go one step further and set the copper resistivity to zero. But you see my point. 25

  26. Putting this all together … There should be a “step” discontinuity element model between these two elements. Fortunately, its effect in this work was negligible. Do not leave it out – you may not be so lucky. The text is just legible. I have altered some of the MWO optional settings to achieve this. Otherwise with default settings, the text would be illegible at this scale. 26

  27. But all goes to custard … I suspect it is the stub terminations not providing a good short circuit at 1.5 GHz. But I should check whether the input and output dc blocks have an adverse effect. 27

  28. To test whether the stub terminations are a problem, I temporarily set the capacitor inductance to zero and connected it direct to ground (artificially bypass its via) … As you can see, amplifier response is fixed up. But this does not solve the problem. Why? 28

  29. We need to look critically at the stub termination and the input and output dc blocks … Stub termination which is meant to be an RF short As can be seen, there is significant departure from what was assumed for the stub termination. Port connection is not too bad. So we can safely say that it is not causing the problem at the centre frequency. 29

  30. For the stub termination, one would reduce the capacitor value to series resonate with its parasitic inductance and via inductance …. Although a short has been obtained at 1.5 GHz, the terminating impedance quickly increases away from the centre frequency. This could allow RF currents (out of band) to leak into the supply resulting significant out-of-band EMI. Where do these out of band signals come from?? 30

  31. If we parallel a large and small valued capacitor to improve the response at low frequencies as well as obtain zero impedance at the centre frequency, the result is worse with a parallel resonance at about 1 GHz … The problem is that the large valued capacitor is inductive when the small valued one is capacitive. Connection to stub 31

  32. We can add a series resistance of in series with the large valued capacitor to eliminate the parallel resonance …. Although not perfect, it is better than two capacitors in parallel. Connection to stub 32

  33. To be connected to end of stub Connection to bias circuitry (includes resistance). to supply Short circuit obtained at 1.5 GHz. Stub termination found to be essentially invariant with connection to supply. This implies good RF bypassing. to supply 33

  34. Putting this all together … The schematic is now large which means that the text is now illegible. So we need to magnify portions of this schematic to reveal details. eg. see next slide for an example. We have now a healthy response and at the centre frequency, it does what we expect. But we still have work to do … For instance you could adjust input and output decoupling capacitances to lower gain hump left of the pass-band. 34

  35. You would do this for other parts of the main schematic 35

  36. Matching circuit stubs to collector bias circuit to base bias circuit Amplifier Layout Although we could continue to complete the bias circuitry layout, there is more that can be done to improve the layout to make better use of the circuit board. (We certainly don’t require connections to the supply to have a characteristic impedance of 50 ohm.) But I have forgotten a microstrip discontinuity model …. 36

  37. The MSTEP discontinuity accounts electrical artefacts resulting from a step change in microstrip width. It does not affect the layout (and has no foot print). Incidentally: All other discontinuities (MTEE, MCROSS, MLEF etc) do more than add a foot-print to the layout: they account for electrical artefacts resulting when EM fields are distorted at the discontinuity. It was found that the step discontinuity had negligible affect on the amplifier response. But for completeness we need to include its affect. NOTE: Take care that you use discontinuity elements correctly – ie make sure that the discontinuity port widths equal to the widths of the corresponding ustrip connection to it. See how I have used MTEE. If microstrips are connected to all ports of the discontinuity – use the model with a “$” after it (as I have done for MSTEP) as this will help ensure that widths reconciled. Use “closed form” models as the electrical properties are described by algebraic equations. 37

  38. We can use the MTRACE2 element which is a meanderable length of microstrip. Tip of the Day: Double click on the element to reveal a dialogue box with all the parameters associated with the element. Within the dialogue box, “Element Help” is available which describes the element details including parameter definitions. You will find “Element Help” useful for graphical editing (ie meandering) MTRACE2 element. In the layout editor: Make sure that you do not inadvertently change width or length of matching network microstrips. 38

  39. Final schematic after all bias circuit layout has been completed … I have included at 2.2 uF capacitor across the supply. I have no idea what its parasitic inductance is. I guessed 100 nH. In YOUR blog, you would need to magnify various parts of the schematic to reveal the detail. 39

  40. Final response. Works as desired and nothing untoward even when I added a very high value of inductance to emulate supply inductance. In this case, bandwidth = 1.627 – 1.431 GHz = 196 MHz or 13 % 40

  41. This shows the current into port 1, the current out of port 2 and the current into the supply as a function of frequency. Note that the horizontal axis scale needs some improvement. Tip of the Day: Graph properties can be accessed by right-clicking on the graph. This shows RF current going in the supply current is low but not negligible. An extra EMI filter may need to be installed. This is common practice (see power and data cables). 41

  42. Make sure that additional polygons and text are on the same layer as the microstrip (eg. THICK METAL) In the layout editor: Make sure that you do not inadvertently change width or length of matching network microstrips. I have used SMT1206 for the supply connection and 2.2 uF capacitor. But this was arbitrary to keep the solder pads together. It should be stated that there is no single correct layout. So although I am happy with my layout – there are other alternatives that may be better. 42

  43. Only the Thick Metal and Via layers will be written to the DXF file. 43

  44. Make sure this type of via is used 44

  45. Export to a DXF file which can then be imported into CorelDRAW … 45

  46. Fill all polygons with BLACK. All lines should be BLACK / HAIRLINE 46

  47. UNGROUP all objects. Then WHITE fill all vias … CorelDRAW file is ready to be sent to the Electronic Workshop for PCB manufacture 47