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Randy Morris, Avinash Kodi and Ahmed Louri

Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault Tolerance. Limiting Amplifier. Driver for Electronics. Photo- detector. TIA. Buffer Chain. Optical Layer 3. Optical Layer 2. T x. T x. T x. T x. R x. R x. R x. R x.

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Randy Morris, Avinash Kodi and Ahmed Louri

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  1. Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault Tolerance Limiting Amplifier Driver for Electronics Photo- detector TIA Buffer Chain Optical Layer 3 Optical Layer 2 Tx Tx Tx Tx Rx Rx Rx Rx Micro-ring resonator λ4 λ1 λ2 λ3 λ4 λ1 λ2 λ3 Optical Layer 1 Off-Chip Laser Source: ShekarBorkar, Intel Optical Layer 0 Core A Core B Nanophotonics: Energy/bit Bandwidth On-die energy: Interconnect Compute Electro-Optic Transceivers Layer 2 More details in the Interconnects Session IV, Tuesday 10:30-12:00 Layer 1 Optical Die Core + Cache + MC 36% External Laser 23% TSVs Randy Morris, Avinash Kodi and Ahmed Louri Electrical Die Heat Sink Energy/bit 23-36% for R-3PO compared electrical or nanophotonic networks 3D Stacking: Bandwidth density Reconfiguration

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