1 / 29

Low Power Time-to-Digital Converter for Pixelated Detector

This paper presents a low power time-to-digital converter (TDC) for pixelated detectors, achieving a timing precision of 6.9 ps RMS. The TDC utilizes a Vernier architecture and features low area and power consumption, making it suitable for high-performance detectors. Ongoing work includes adding feedback and calibration for further improvement.

jackt
Download Presentation

Low Power Time-to-Digital Converter for Pixelated Detector

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Low Area and Low Power Time-to-Digital Converter for Pixelated Detector with 6.9 ps RMS Timing Jitter Nicolas Roy Frédéric Nolet, Frédérik Dubois, Réjean Fontaine, Jean-François Pratte FEE 2018 May 21st

  2. Towards Time-of-Flight in LabPETPreclinical Scanners 20xx Time-of-Flight (TOF) PET scanner 2017 - Spatial resolution < 1 mm - Modular architecture 2005 1st APD-based commercial PET scanner 1995 1stAPD-basedPET scanner (prototype) Requiresps timing precision BGO scanner, Université de Sherbrooke LabPET I, Université de Sherbrooke LabPET TOF, Université de Sherbrooke LabPET II, Université de Sherbrooke Nicolas.Roy6@USherbrooke.ca

  3. How to Achieveps Timing Precision? • SPAD-to-SPAD skew • (tens of ps) • 1 timestamp/array • Large output capacitance • Not suitable for < 10 ps SPTR (single photon timing resolution) Analog SiPM Nicolas.Roy6@USherbrooke.ca

  4. How to Achieveps Timing Precision? Our approach • SPAD-to-SPAD skew • 1 timestamp/array • Large output capacitance • Not suitable for < 10 psSPTR (single photon timing resolution) SPAD Digital SiPM Nicolas.Roy6@USherbrooke.ca

  5. How to Achieveps Timing Precision? 3D Integration • Maximize photosensitive area • Heterogeneous technologies Integration Optoelectronics TSMC CMOS 65 nm 50 µm 50 µm Nicolas.Roy6@USherbrooke.ca

  6. How to Achieveps Timing Precision? TDC Requirements • Low area • Low power consumption • High timing performance TDC 50 µm 50 µm Nicolas.Roy6@USherbrooke.ca

  7. Implemented Vernier TDC Nicolas.Roy6@USherbrooke.ca

  8. Implemented Vernier TDC Nicolas.Roy6@USherbrooke.ca

  9. Vernier TDC PrelogicDiagram Controls the state ON/OFF of the oscillators Nicolas.Roy6@USherbrooke.ca

  10. Coincidence Arbiter Nicolas.Roy6@USherbrooke.ca

  11. Oscillators • AdjustedwithexternalDACs • Lowjitteroscillators= lowjitter TDC • TDC jittermostlydominatedby the number of vernier cycles (nvernier) where Nicolas.Roy6@USherbrooke.ca

  12. TDC Layout TDC area 25 × 50 µm2 Nicolas.Roy6@USherbrooke.ca

  13. Data Acquisition System ASIC interface PCB Data acquisition PCB TSMC CMOS 65 nm Nicolas.Roy6@USherbrooke.ca

  14. Timing JitterVS TDC Codes • 7 coarses @ 430 ps/coarse • Vernier cycles from 1 to 29 Coarsecycles 6 7 29 4 5 3 2 1 Vernier cycles 1 Overall TDC jitter : 6.9 psrms Nicolas.Roy6@USherbrooke.ca

  15. Timing JitterVS TDC Resolution 6.9 psrms Nicolas.Roy6@USherbrooke.ca

  16. Supply Voltage and TemperatureSensitivity Slow OscillatorPeriod • ~0.7 ps/°C • ~0.5 ps/mV LSB Varies from~11 % over the supply and temperature variations Will needfeedback + calibration! Nicolas.Roy6@USherbrooke.ca

  17. Linearity INL 0.39 LSB rms 0.83 LSB max DNL 0.08 LSB rms 0.47 LSB max * LSB = 15 ps Nicolas.Roy6@USherbrooke.ca

  18. Power Consumption: A System Perspective LabPET II rabbit scanner LabPET II rabbit scanner 50 000 detectors of 1.1 × 1.1 mm2 50 000 detectors of 1.1 × 1.1 mm2 24.2 × 106 SPAD (or TDCs) @ 50 µm pitch 24.2 × 106 SPAD (or TDCs) @ 50 µm pitch 3.9 kW (for TDCs) @ 160 µW/TDC (520W for current detectors in LabPET II) Toomuch!!! Nicolas.Roy6@USherbrooke.ca

  19. Power Consumption: A System Perspective LabPET II rabbit scanner LabPET II rabbit scanner 50 000 detectors of 1.1 × 1.1 mm2 50 000 detectors of 1.1 × 1.1 mm2 24.2 × 106 SPAD (or TDCs) @ 50 µm pitch 24.2 × 106 SPAD (or TDCs) @ 50 µm pitch 968 W (for TDCs) @ 40 µW/TDC (520 W for current detectors in LabPET II) Expected (simulations) Better Nicolas.Roy6@USherbrooke.ca

  20. TDC Comparison FOM = pJ/event Nicolas.Roy6@USherbrooke.ca

  21. Conclusion How to Achieveps Timing Precision? Small Area (0.0013 mm2) LowPower (40 µW expected) • 1 TDC/SPAD • Good TDC Resolution Vernier TDC (LSB = 15 ps) • Low TDC Jitter(6.9 psrms) • Add feedback + calibration (or less) Ongoingwork http://www.vancitymommyd.com Nicolas.Roy6@USherbrooke.ca

  22. Thankyou!

  23. Backup Slides

  24. TDC Timing Diagram Nicolas.Roy6@USherbrooke.ca

  25. Prelogic Bloc Diagram Actual Design Low Power Design Nicolas.Roy6@USherbrooke.ca

  26. Coincidence Circuit Timing Diagram Nicolas.Roy6@USherbrooke.ca

  27. Coincidence (correction bit) Fastosc. startsinside the correction zone = correction Fastosc. startsoutside correction zone = no correction Nicolas.Roy6@USherbrooke.ca

  28. Density Codes Nicolas.Roy6@USherbrooke.ca

  29. Power Consumption • Now • Dependent on stop frequency • 160 µW @ 333 MHz stop frequency • NextStep • Avoiding the TDC fromstarting at every stop signal • 40 µWestimatedfrom simulations Nicolas.Roy6@USherbrooke.ca

More Related