One-Hot Seq. Circuit Delay

1 / 2

# One-Hot Seq. Circuit Delay - PowerPoint PPT Presentation

One-Hot Seq. Circuit Delay. Shantanu Dutt ECE Dept. UIC. O/P logic critical path. Ext. O/Ps. NS+O/P Logic. Ext. I/Ps. NS exc. bits. State bits. FFs. NS logic critical path. Critical paths in the comb. logic of a Mealy seq. ckt.

I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.

## PowerPoint Slideshow about 'One-Hot Seq. Circuit Delay' - ilar

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.

- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript

### One-Hot Seq. Circuit Delay

Shantanu Dutt

ECE Dept.

UIC

O/P logic

critical path

Ext. O/Ps

NS+O/P Logic

Ext. I/Ps

NS exc. bits

State bits

FFs

NS logic

critical path

Critical paths in the comb. logic of a Mealy seq. ckt

A critical path (max-delay path) in the next-state (NS) logic. Delay is from Q,D,N i/ps to the FF D-ips. Delay = demux delay (3-i/p AND gate delay) + 3-i/p OR gate delay = 6 units

A critical path in the o/p) logic for a Mealy m/c. Delay is from Q,D,N i/ps to the ckt o/p(s). Delay = demux delay (3-i/p AND gate delay) + 3-i/p OR gate delay = 6 units

Critical path in the o/p) logic for a Moore m/c. Delay is from Q,D,N i/ps to ckt o/p(s). Delay = 0 units as there is no logic reqd in this case