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Digital Fundamentals

Digital Fundamentals. CHAPTER 3 Logic Gates. Logic Gates . Inverter AND Gate OR Gate Exclusive-OR Gate NAND Gate NOR Gate Exclusive-NOR Gate. The Inverter. Truth table 0 = LOW 1 = HIGH. Boolean expression. Pulsed waveforms. The Inverter .

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Digital Fundamentals

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  1. Digital Fundamentals CHAPTER 3 Logic Gates

  2. Logic Gates • Inverter • AND Gate • OR Gate • Exclusive-OR Gate • NAND Gate • NOR Gate • Exclusive-NOR Gate

  3. The Inverter

  4. Truth table 0 = LOW1 = HIGH Boolean expression Pulsed waveforms The Inverter The output of an inverter is always the complement (opposite) of the input.

  5. The AND Gate

  6. Boolean expression Truth table 0 = LOW1 = HIGH Pulsed waveforms The AND Gate The output of an AND gate is HIGH only when all inputs are HIGH.

  7. 3-Input AND Gate 4-Input AND Gate The AND Gate

  8. The OR Gate

  9. Boolean expression Truth table 0 = LOW1 = HIGH Pulsed waveforms The OR Gate The output of an OR gate is HIGH whenever one or more inputs are HIGH

  10. 3-Input OR Gate 4-Input OR Gate The OR Gate

  11. The NAND Gate

  12. Boolean expression Truth table 0 = LOW1 = HIGH Pulsed waveforms The NAND Gate The output of a NAND gate is HIGH whenever one or more inputs are LOW.

  13. 3-Input NAND Gate 4-Input NAND Gate The NAND Gate

  14. The NOR Gate

  15. Boolean expression Truth table 0 = LOW1 = HIGH Pulsed waveforms The NOR Gate The output of a NOR gate is LOW whenever one or more inputs are HIGH.

  16. 3-Input NOR Gate 4-Input NOR Gate The NOR Gate

  17. Exclusive-OR and Exclusive-NOR Gates

  18. Boolean expression Truth table 0 = LOW1 = HIGH Pulsed waveforms Exclusive-OR Gate The output of an XOR gate is HIGH whenever the two inputs are different.

  19. Boolean expression Truth table 0 = LOW1 = HIGH Pulsed waveforms Exclusive-NOR Gate The output of an XNOR gate is HIGH whenever the two inputs are identical.

  20. Programmable Logic

  21. Programmable Logic • Programmable AND array • Programmable link technology • Device programming • In-system programming (ISP)

  22. Programmable Logic • Programmable AND array

  23. Programmable Logic Programmable link technology • Fuse technology • Anti-fuse technology • EPROM technology • EEPROM technology • SRAM technology

  24. Programmable Logic Device programming • Design entry • Text entry • Graphic (schematic) entry

  25. Programmable Logic • In-system programming (ISP) • Joint Test Action Group (JTAG) • Imbedded processor

  26. Fixed-Function Logic

  27. Fixed-Function Logic • CMOS • TTL

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