L17 – Interrupts

1. ECE 2560 L17 – Interrupts Department of Electrical and Computer Engineering The Ohio State University ECE 2560

2. Interrupts • What happens during interrupts • How to set them up • An important register – the flags register ECE 2560

3. Microcontroller interrupts • An example – Zilog Z8051 • An early micro controller • On many early microcontrollers physical pins were the interrupt pins • IRQ – Maskable interrupt pin • FIRQ – Fast Interrupt • On these chips there is a flag in the status register (SR) that enables interrupts or disables interrupt. ECE 2560

4. The MSP430 Interrupts • The status register • GIE- General Interrupt Enable • Interrupts can be generated on most external pins – any digital I/O • Interrupts also generated by internal devices like the timers. ECE 2560

5. Steps need to use interrupts • For a port • Configure the pin • Set the GIE bit in SR to allow interrupts. ECE 2560

6. Interrupts on I/O pins • Setting up the port • The I/O registers • P1SEL,P1IN, P1OUT, P1DIR, P1IE,P1IES • P1IFG – Port 1 Interrupt flag register • each bit of the register is the flag for that pin • a r/w register – bit is set when pin is an input and proper transition occurs – bit must be cleared using software instruction. • A program can be written that checks this flag. • Run through Demo in class ECE 2560

7. Can this use interrupts? • This can use interrupts but the flag must be cleared. • To actually use an interrupt service routine the bit must be cleared while program is waiting for interrupt. • One of the actions of the service routine is to clear the flag prior to return. • Note that this is at the port level. ECE 2560

8. What happens during? • When an interrupt occurs • The current instruction completes execution • The PC value is pushed onto the stack • The SR value is pushed onto the stack • The PC is loaded with the contents of the word stored at what is call an interrupt vector. • Execution continues in what is termed an interrupt service routine, ISR. ECE 2560

9. Interrupt vector • A small area of memory that hold the address to load into the PC when an interrupt occurs – several locations – called the Interrupt Vector Table • On the MSP 430 • Reset,external hard reset FFFFh • NMI, osc fault FFFCh • Watchdog Timer+ (int10) FFF4h • Timer A1_A3 (CCIFG) (int13) • I/O Port 2 (int03) FFF4h • I/O Port 1 (int02) FFF2h ECE 2560

10. Interrupt service routine • The top two elements on the stack are the saved SR and the return address. • Return is the next instruction in the program that was interrupted. • ISR does not want to disturb the state of the program that was interrupted so any register to be used should be saved on the stack (and restored) • At end of ISR an RETI is executed. ECE 2560

11. Interrupt action ECE 2560

12. Demo program • Set up port 1 • mov.b #0x00,P1SEL ;I/O for all • mov.b #0xF7,P1DIR ;P1.3 in • mov.b #0x00,P1OUT ;all 0’s • bis.b #0x08,P1IE ;sw enable int • bis.b #0x08,P1ES ;falling edge • bis.b #0x08,P1REN ;res enable • bis.b #0x08,P1OUT ;pullup • clr.b P1IFG ;clear flags • bis.b #0x08,SR ;enable int ECE 2560

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16. Summary - Assignment • Try out the code • Try modifications to the code. • No new assignment. ECE 2560