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ARM: Powering Smartphones, Cameras, TVs, and More

Discover why ARM processors are the go-to choice for a wide range of products, from smartphones and digital cameras to portable gaming consoles and GPS navigation systems.

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ARM: Powering Smartphones, Cameras, TVs, and More

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  1. Why ARM? ARM Powered Products • Smartphones; almost all mobile phones • digital cameras • digital TVs • Portable gaming consoles (e.g. Nintendo DS, PlayStation Portable, GameBoy Advance, GP2x • Smart meter at home • Portable Media Players, Camcorders • Apple iPod • GPS Navigation Systems • Tom Tom 300 • Hard Discs, Routers, …

  2. Instruction Set Architectures • Early trend was to add more and more instructions to new CPUs to do elaborate operations • VAX architecture had an instruction to multiply polynomials! • RISC philosophy (Cocke IBM, Patterson, Hennessy, 1980s): Reduced Instruction Set Computing • Keep the instruction set small and simple; makes it easier to build fast hardware. • Let software (compiler) do complicated operations by composing simpler ones. • ARM is RISC

  3. Processor Modes • ARM has seven basic operating modes • Each mode has access to its own stack space and a different subset of registers • Some operations can only be carried out in a privileged mode Exception modes

  4. Processor Modes • We will mainly use User mode. Other modes much less important for this class. • For now, only concerned with r0-r12; treat these as registers that can be used to store any variable.

  5. ARM Registers • ARM processors, with the exception of ARMv6-M and ARMv7-M based processors, have a total of 37 or 40 registers depending on whether the Security Extensions are implemented. • registers are arranged in partially overlapping banks. • There is a different register bank for each processor mode. • The banked registers give rapid context switching for dealing with processor exceptions and privileged operations. • Additional registers are available in privileged software execution.

  6. ARM Registers Additional registers in ARM processors, with the exception of ARMv6-M and ARMv7-M, are: 2 supervisor mode registers for banked SP and LR 2 abort mode registers for banked SP and LR 2 undefined mode registers for banked SP and LR 2 interrupt mode registers for banked SP and LR 7 FIQ mode registers for banked R8-R12, SP and LR 2 monitor mode registers for banked SP and LR 6 Saved Program Status Register (SPSRs), one for each exception mode.

  7. User mode IRQ FIQ Undef Abort SVC r0 r1 r2 r3 r4 r5 r6 r7 r8 r8 r9 r9 r10 r10 r11 r11 r12 r12 r13 (sp) r13 (sp) r13 (sp) r13 (sp) r13 (sp) r13 (sp) r14 (lr) r14 (lr) r14 (lr) r14 (lr) r14 (lr) r14 (lr) spsr spsr spsr spsr spsr The ARM Register Set ARM has 37 registers, all 32-bits longA subset of these registers is accessible in each mode Note: System mode uses the User mode register set. r15 (pc) cpsr Current mode Banked out registers

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