Performance of the Beetle Readout Chip for LHCb

1. Performance of the Beetle Readout Chip for LHCb Niels van Bakel, Martin van Beuzekom, Eddy Jans, Sander Klous, Hans Verkooijen (NIKHEF Amsterdam, Free University of Amsterdam) Daniel Baumeister, Werner Hofmann, Karl-Tasso Knöpfle, Sven Löchner, Michael Schmelling (Max-Planck-Institute for Nuclear Physics, Heidelberg) Ulrich Trunk (University of Heidelberg) Neville Harnew, Nigel Smale (University of Oxford)

2. Beetle: Outline • Beetle Overview • Beetle 1.2 • Analogue readout • Front end • Comparator • Binary readout • Pipeamp / Multiplexer • SEU hard Fast Control / Slow Control • Results from Total Ionizing Dose (TID) irradiation test • Summary Performance of the Beetle Readout Chip for LHCb

3. Beetle: A Readout Chip for LHCb • analogue / binary pipeline chip • providing a prompt binary readout for trigger applications • integrated in a standard 0.25 µm CMOS technology • designed for: • Silicon Vertex Detector • Pile-up Veto Trigger • Inner Tracker • RICH (in case of MAPMTs) • Key Specifications: • 40 MHz sampling • max. latency 4 µs • 40/80 MHz readout • fast shaping: • trise 25 ns • remainder 25 ns after peak  30% • accept up to 16 consecutive triggers • readout time  900 ns / trigger • radiation hard  10 Mrad Performance of the Beetle Readout Chip for LHCb

4. Beetle: Architecture Performance of the Beetle Readout Chip for LHCb

5. Beetle: Layout / Floor plan 5.1mm 6.1mm Layout of the Beetle 1.2 chip and its corresponding floor plan. Performance of the Beetle Readout Chip for LHCb

6. Analogue readout • small, but constant baseline dip • header levels: +/- 42.150 e- (118 e-/mV) • correct encoded header • 1 Start-bit1 Parity-bit of Pipeline Column Number • 1 EDC status-bit 3 different parity-bits of registers • 2 LSB-bits of the SEU-counter8 Pipeline Column Number (PCN) bits Header Analogue data readout on 1 port: 16 bit header, 128 bit data Performance of the Beetle Readout Chip for LHCb

7. 3pF 51pF Front end: Pulseshape (1) peaktime (0-100) Front end behaviour of the Beetle 1.2 (measured with different Cp) Ipre=600µA, Isha=80µA, Ibuf=200µA, Vfp=0V, Vfs=0V • peaktime  25 ns for Cp  51pF Performance of the Beetle Readout Chip for LHCb

8. 3pF 51pF Front end: Pulseshape (2) risetime (10-90) Front end behaviour of the Beetle 1.2 (measured with different Cp) Ipre=600µA, Isha=80µA, Ibuf=200µA, Vfp=0V, Vfs=0V • risetime  17 ns for Cp  51pF Performance of the Beetle Readout Chip for LHCb

9. 3pF 51pF Front end: Pulseshape (3) remainder after 25ns Front end behaviour of the Beetle 1.2 (measured with different Cp) Ipre=600µA, Isha=80µA, Ibuf=200µA, Vfp=0V, Vfs=0V • remainder 25 ns after peak is less than 30% for Cp < 35pF Performance of the Beetle Readout Chip for LHCb

10. Front end: ENC p r e l i m i n a r y ! measured ENC of the new front end on a complete readout chip Beetle 1.2: Heidelberg: 497 e- + 48.3 e-/pF measured ENC of the new front end on a test chip BeetleFE 1.1: NIKHEF: 429 e- + 47.0 e-/pFZurich: 436 e- + 47.7 e-/pFHeidelberg: 483 e- + 45.7 e-/pF Performance of the Beetle Readout Chip for LHCb

11. Front end: Dynamic range Dynamic range for both polarities: +/- 110.000 e-: < 2% for negative pulses < 5% for positive pulses Performance of the Beetle Readout Chip for LHCb

12. Beetle 1.2: Comparator (1) • adjustable threshold for each channel • global threshold • channel threshold • Integrator extracts DC-level of shaped front-end pulse and adds it to threshold • adjustable time-constant • mask register for each channel • multiple operation modes • digital part is now SEU hard (triple redundant logic) Performance of the Beetle Readout Chip for LHCb

13. Beetle 1.2: Comparator (2) fast LVDS output signal track mode“on” as long as signal is over threshold shaped front-end pulse very long shaping pulse mode“on” only for one BXone BX dead time Performance of the Beetle Readout Chip for LHCb

14. Binary readout • new output buffer for pipeline-mode • no signal spill-over to the next bunch crossing Fast comparator output (LVDS signal) DataVaild (LVDS signal) Comparator in pipeline-modeAnalogue output pads switched to LVDS output pads Performance of the Beetle Readout Chip for LHCb

15. Beetle 1.1 Occurs only in 128 channels on 1 port output mode Floating wire between Pipeamp and MUX  wrong DC operation point at the beginning of a readout Low trigger rate Readout at trigger rates of 1 Hz and below Beetle 1.2 Performance of the Beetle Readout Chip for LHCb

16. Output Driver / Modes • Analogue Output Driver • bidirectional current driver • designed to drive analogue signals more than 10 m • Binary Output Driver • implemented as LVDS transceiver • used for the digital pipelined comparator signals same output pads for both output drivers • Modes of output operation • on 4 ports @ 40 MHz in parallel: readout in 900 ns • on 2 ports @ 80 MHz in parallel: readout in 900 ns • on 1 port @ 40 MHz: readout in 3.4 µs (for test purposes) Performance of the Beetle Readout Chip for LHCb

17. Beetle 1.2: Biasing • DAC resolution reduced from 10 bit to 8 bit • Doubled the max. output current of all Current DACs from 1 mA to 2 mA • Self triggered, triple redundant flip-flops in all bias registers => Hardened against SEU triple redundant flip-flopwith flip indication Performance of the Beetle Readout Chip for LHCb

18. Fast control / Slow control • Slow control (I2C-Interface and Register Control) • Hardened against SEU (state machines use triple redundant flip-flops with majority encoding) • Hard wired 7-bit Chip Id. • 20 write- and readable 8-bit registers • 3 write- and readable mask-registers (in total 641 bits) • 1 SEU counter (8-bit). (counts all detected and corrected SEU flips). • Fast control (Pipeline and Readout Control) • SEU hard • New reset schema (only one external reset; internal power-up resets all bias and state registers) • New control schema of the Pipeamp / MUX to prevent the sticky charge problem at low trigger rates. • Trigger is latched internally (“Trigger phasing”) • Daisy-Chain concept is now implemented • New 8-bit analogue readout header (Start-bit, Parity-bit, EDC status-bit, 3 different parity-bits of registers, 2 LSB-bits of the SEU-counter) Performance of the Beetle Readout Chip for LHCb

19. Total Ionizing Dose irradiation Done at the X-ray facility of CERN‘s Microelectronic Group • Irradiated Chips: • 4 Beetle 1.1 chips • 2 chips being kept at room temperature • 2 chips being annealed at 100 °C • 2 BeetleFE 1.1 chipscontaining FE prototypes with a NMOS input transistor • 2 BeetleFE 1.2 chipscontaining FE prototypes with a PMOS input transistor • Accumulated Dose: • Beetle 1.1: 10 Mrad, 10 Mrad, 30 Mrad, 45 Mrad • BeetleFE 1.1: 10 Mrad • BeetleFE 1.2: 10 Mrad Performance of the Beetle Readout Chip for LHCb

20. Beetle 1.1 TID: Results of Beetle 1.1 • Beetle 1.1 showed full functionality beyond 45 Mrad • full trigger and readout functionality • full slow control functionality • performance degradations are small • peaktime: up to 30 Mrad:  1 ns up to 45 Mrad:  4,5 ns • gain: up to 45 Mrad:  10% no tuning of bias settings Performance of the Beetle Readout Chip for LHCb

21. Summary Performance of the Beetle Readout Chip for LHCb

22. Beetle Specification: L1 Interface • Rather well defined: http://lhcb-elec.web.cern.ch/lhcb-elec/html/key_parameters.htm • Bunch crossing rate: 40.08 MHz • Maximum L0 rate: 1.1 MHz • L0 latency: 4.0 µs = 160 clock periods • L0 gap: None • Consecutive L0 triggers: max. 16 • L0 trigger types: only one (normal trigger) • Samples to extract per L0 accept: one per channel (multiple samples if required) • L0 derandomizer depth: 16 events • L0 derandomizer readout time: (32 + 2 + 2) * 25 ns = 900 ns • L0 restrictions: emulation of front-end buffers  predictable release of derandomizer buffers • Bunch crossing clock and L0 distribution: TTC system • Synchronization checks: all event data must carry synchronization checking data PCN • Location and qualification of L0 front-end electronics • 0.25 µm CMOS technology & special design rules ensure radiation hardness > 10 Mrad • L1 buffer input speed: 900 ns minimum spacing between events • L0 front-end reset Performance of the Beetle Readout Chip for LHCb

23. Specification: Detector Interface Performance of the Beetle Readout Chip for LHCb

24. Beetle 1.2: Comparator (2) LVDS output signal • new output buffer for pipeline-mode • no signal spill-over to the next bunch crossing shaped front-end pulse short shaping track mode“on” as long as signal is over threshold pulse mode“on” only for one BXone BX dead time very long shaping Performance of the Beetle Readout Chip for LHCb

25. Beetle 1.2: Pipeamp / Multiplexer Block schematic and timing of Pipeamp / MUX Performance of the Beetle Readout Chip for LHCb

26. TID: Results of Beetle 1.1 (2) Performance of the Beetle Readout Chip for LHCb

27. TID: Results of BeetleFE 1.1 only minor performance variations during irradiation typical slope: 0.1 ns/Mrad Performance of the Beetle Readout Chip for LHCb

28. Next steps / Outlook up to now Beetle 1.2 fulfils all LHCb specifications except for consecutive readouts • Next steps: • Lab-test of the Beetle 1.2 (readout modes, more pulseshapes, pipelinehomogenity, ...) • Random trigger tests • ENC measurements • TID irradiation test • SEU test • ... Performance of the Beetle Readout Chip for LHCb

29. Readout consecutive readout (no gap between two readouts) non-consecutive readout (minimum gap between two readouts) Performance of the Beetle Readout Chip for LHCb