L2ßeta: Current Focus • Last Friday’s meeting at UMD: • Bob Hirosky, Drew Baden, Rob Bard, John Giganti • Discussed details of various SBC and I/O card options • Re-iterated desire for simple, ~‘off-the-shelf’ re-implementation • More detailed discussions of hardware requirements • Discussion of ß-2-ß PIO reduction for multiprocessor models • AGP-style solutions set aside - leverage existing PCI experience for minimum development time • Prime contenders include: • SBCs: single or dual PIIIs dual or quad G4s • I/O: (modified) s-link PMC(s) Catalina 64bit PMC • or similar (Transtech) (vs redesign)
Summary of Hardware findings CPU boards: SINGLE->QUAD Power PC Variety SINGLE->DUAL PIII Variety I/O CARDS: PMC CARDS w/ Internal FIFO/MEMORY Catalina (64 bits wide at 33MHz) S-link (32 bits wids at 33 MHz) Transtech (64 bits wide at 66 MHz) NEW FIND!
Single/Dual/Quad PPC 750 450 MHZ PPC 7400 to come DUAL/QUAD Power PC Option 30% faster than alpha in INTs about the same in fp
Power PC option comments cost ~ $8K(dual)/14K(quad) • Pro: • Quad CPU board can replace a whole crate, no need to alpha-alpha PIO - use shared memory instead • 2 PMC slots are on completely separate busses - limits bus latency • 64bits/66MHz - higher bandwidth for DMA • 32bits/33MHz - lower bandwidth for other things • Con: • Longer startup curve due to switch to PowerPC linux? • Compiler options under Linux? Linux compatible images? • Single vendor for this QUAD board, several for single/duals
A Dual Pentium III Option Dual 1GHz PIII specint95 46.6 vs alpha 15.4
PIII option comments • Pro: • Huge amounts of CPU now on the shelf • More familiar Linux • KAI compiler under Linux • Con: • PCI bus is only 32bits/33MHz - would have to live w/ estimated 65MB/s Max bandwidth (vs 80 ish now) • No QUAD option yet - can’t replace a whole crate • Maybe single vendor for the dual PIII board, many for singles
Catalina PMC card comments cost ~ $4.5K • Pro: • 64 bits wide w/ user programmability in onboard FPGA • FPGA programmable from PCI bus! • Lots of FIFO space on board, we could do w/o FIFO’s on our adapter card • Should be able to get LINUX drivers • Con: • Runs only at PCI 33MHz, same as we have now • It’s a one way card, need another PMC card for output
CERN S-link to PMC, PMC to S-link Input Card Output Card
S-link PMC card comments • Pro: • Lots of support from CERN/LHC • We could use this as a base design if we later build PMC cards ourselves • Con: • Runs only at PCI 33MHz / 32 bits • way cards, use two of them or modify an existing design
Transtech PMC card comments cost ~ $2.5-5K, depending on FPGA • Pro: • 64 bits wide w/ user programmability in onboard FPGA • 66 MHZ PCI interface • It’s a two-way card • Choice of onboard FPGA • Lots of fast on board SRAM (can it replace fifo’s) • Promise of LINUX drivers • This company is working w/ DNA computers • Con: • FPGA programming might be a bit more difficult if we use the onboard memory to implement or FIFOs • Not delivered yet (but promise several week time scale - this board is a modification of an existing DSP board, not made from scratch) Newest find - need to do more research on this one, but it looks promising
SYSTEM OPTIONS QUAD PowerPC + Catalina card + output PMC QUAD PowerPC + Transtech card Fastest I/O option of removing alpha-alpha PIO separate PCI buses, may make this a non-issue Linux/Compiler issues Less certain about future enhancements to SBC PIII + S-link Card Compilers / Familiar Linux Maximum symmetry w/ existing system 18-25% PCI BW hit, ~65MB/s max (MBdma needs~ 20MB/s) Continuing work on draft TDR for mid Feb...