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External Memory & I/O

External Memory & I/O . External communications Designing an external 3 Byte Interface. Computer Bus. The processor within a computer communicates with the other computer modules via a device called : Bus .

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External Memory & I/O

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  1. External Memory & I/O External communications Designing an external 3 Byte Interface Jordan Nash - Microprocessor Course

  2. Computer Bus The processor within a computer communicates with the other computer modules via a device called: Bus. Many different Bus architectures exist in the market such as PCI; cPCI; VME…. All bus architectures include a control bus, a data bus and an address bus. Jordan Nash - Microprocessor Course

  3. The BUS of a computer: Bus Master (CPU/Controller) Bus Slave (e.g. Memory) Address Lines Data Lines Control Lines Jordan Nash - Microprocessor Course

  4. Typical Write Sequence The bus master places the address of the memory where the datum is to be written on the bus and validates it using the control lines. The master signals using the control lines that this is a write sequence. The master places the datum to be written onto the bus and validates it using the control lines. Each slave compares the address on the bus with its own address. If the write refers to it, it takes the data and signals (acknowledges) using the control lines that this has been done. Jordan Nash - Microprocessor Course

  5. Typical Read Sequence The master places the address of the memory from where the datum is to be read on the bus and validates it using the control lines. The master signals using the control lines that this is a read sequence. The master signals that it is ready to accept the datum using the control lines. The slave compares the address on the bus with its own address. If the read refers to it, it places the datum on the bus and validates it using the control lines (acknowledges the data). At the end the Master latches the datum. Jordan Nash - Microprocessor Course

  6. Parallel Transfer In a bus all bits of a byte or word are transferred simultaneously. If we have a byte wide bus and a transfer frequency of 1MHz then we have a bus speed of 1Mbytes/sec Hence, this is called Parallel Data Transfer (opposed to Serial Data Transfer that we will learn next) Jordan Nash - Microprocessor Course

  7. Interface to External SRAM Bus is implemented by using two of the ports! Jordan Nash - Microprocessor Course

  8. Electronics Exercise We will now make a 3 Byte interface that you can use for external read and write from/to the ATmega128 board. This is a challenging exercise and will take some time to construct and test Jordan Nash - Microprocessor Course

  9. High Level Design :3 Byte Memory We want to construct : Control and Address bus ATmega103 Board AS, READ WRITE, A0,A1 PORTD (Output Only) 1-Byte Memory 8-Bits of data_out 8-Bits of data_in PORTA (Output) 1-Byte Memory Data Bus Out 1-Byte Memory PORTE (Input) Data Bus In Jordan Nash - Microprocessor Course

  10. We have already seen the 1 Byte memory * = INVERTED Output Enable* (Read Data)       Byte coming in (PORTA) Byte Stored (PORTE) CP (Write Data) Jordan Nash - Microprocessor Course

  11. The data sheets of the 74F574 Jordan Nash - Microprocessor Course

  12. The 74F574 outputs The outputs of the 574 are tri-state : They Can be high ‘1’, low ‘0’, and DISCONNECTED (HIGH IMPEDANCE STATE). Jordan Nash - Microprocessor Course

  13. The 74F574 Function Table When Output Enable (OE*) is low, the data can be read from the register Data can be written to the register at any time by driving the Clock Pulse (CP) from low to high Jordan Nash - Microprocessor Course

  14. Timing diagram: Load Register – Enable Output ts CP D0-D7 tPZH OE O0-O7 Ts= setup time tPZH= Output Enable time Jordan Nash - Microprocessor Course

  15. Timing diagram: write with OE Low CP D0-D7 (in) OE O0-O7 (out) tp Tp= propagation delay Jordan Nash - Microprocessor Course

  16. The data sheet for the 74F138 • You will need to select which memory chip to write to using a binary address • You will convert the 2 bits of “Address” into 3 lines which can be used to control the Enable lines for the three memory chips • To do this use an address decoder • The 74F138 converts a 3 bit address into 8 control output lines • When a given 3 bit number is written on the Address lines one of the 8 output lines is set high Jordan Nash - Microprocessor Course

  17. The 74F138 truth table Jordan Nash - Microprocessor Course

  18. Memory Design Data to write to the memory is placed on PORTAand this is wired to the memory Data Bus The data is read from the memories into PORTEfrom the output Data Bus The control lines for all this are sent on PORTD PORTA PORTE Jordan Nash - Microprocessor Course

  19. Control Bus We need to set four signals to control the memories A0:A1 – The Address Bits. These are used to define which memory chip will be addressed (00,01,10) AS* – The address strobe to select the memory R*/W to Read/Write the selected memory\ We will use bits on PORTD to control these signals – you chose which bits are attached to which control line Jordan Nash - Microprocessor Course

  20. Basic Circuit Control Signals AS,A1,A0 R/W On PORTD Output Data Bus (O0-O7) on PORTE Input Data (D0-D7) Bus – from PORTA Jordan Nash - Microprocessor Course

  21. Logic Gates • You will also use some basic logic gates in your circuit to build the control bus • 74HC04 Hex Not • 74HC08 Quad And • 74HC32 Quad OR Jordan Nash - Microprocessor Course

  22. Logic Table for Control Bus To read a memory, Address it on A0/A1 set AS* to 0 set R*W to 0 To Write a memory, Address it on A0/A1 Set AS* to 0 Change R*W from 0 to 1 Make sure you understand the Logic table and how it is implemented using the logic gates Exercise: Fill in the Table for Read2*/Write2 Jordan Nash - Microprocessor Course

  23. Sequence Diagram: Unneccessary - need another D-Flip-Flop to remove Jordan Nash - Microprocessor Course

  24. The Memory Test Program Start Enable memory 1 output Set data pattern on PORTA Copy PINE to PORTB LEDs Clock in memory 1 Enable memory 2 output Set data pattern on PORTA Copy PINE to PORTB LEDs Clock in memory 2 Set data pattern on PORTA Enable memory 3 output Clock in memory 3 Copy PINE to PORTB LEDs Jordan Nash - Microprocessor Course

  25. Task Plan: • Construct the 3 byte memory and connect it to your ATmage128 Board • Always connect to the ports through the special cable-resistor-pack units • Proceed in steps: • First the Control Bus, test it and verify that it works! • Next add the first memory byte and test it • Add the secondmemory and test it • Add the thirdmemory and test it • Write programs as you go along with the aid of a top-down-modular diagram • Use a main section • Use driver subroutines that read, write, and loop data through your memory bytes. Jordan Nash - Microprocessor Course

  26. Some Comments: • Make a detailed schematic of your device with all ICs (logic diagrams) and the IC pin assignments. • Make sure that you understand your design BEFORE you start building it. • Build the device in pieces which you can check using your software. Don’t build the entire design before testing. • Follow the steps – don’t leap ahead and build too much before checking that everything works at each step. • Use the oscilloscope and the DVM to check what is going on and debug your device. Jordan Nash - Microprocessor Course

  27. How to Draw Schematics: Jordan Nash - Microprocessor Course

  28. Step 1: The control bus Address lines Start by setting the Address Strobe* high Set the correct address on your bus. Now lower the AS* and check that the appropriate output bits are selected for the address of each memory Jordan Nash - Microprocessor Course

  29. The control bus Read/Write • Add the Read/Write control logic • First build Read0*/Write0 • Set AS*high and R*/Whigh. • Set the address on your bus • Lower R*W and AS* • This is a read memory setting • Check that Read0*/Write0 are what you expect • Bring *R/WHigh for 250 nsecand then back Low • This is a write memory • Use a scope to verify the timing • Complete the Read1*/Write1 and Read2*/Write2 circuits • Test that they are working as expected when you select each of the memory addresses. • you are ready to add a memory • Don’t this before your control bus works! Jordan Nash - Microprocessor Course

  30. Step 3: Adding the first memory • Connect the Data Bus (D0-D7) to the 8 bits on PORTA • Connect the OE* to the Read* and CP to the Write lines of your control bus • Using your program • Set AS*high and R*/W high . • Set the correct address and put some data on your bus. • Lower R*/W and AS* • Bring R*/W high for 250 nsecand then back to Low • Your data should now be stored in the selected register, and visible on the outputs • Before you connect the output together use scope/LED+Resistors to check if the data are on the outputs and correct • Connect the Output Bus to the pins on PORTE • Try reading the data with the AVR Jordan Nash - Microprocessor Course

  31. Step 4 Add the second Memory Chip Verify that it is working as expected Finally Add the third memory chip You should now be able to write data to the memory of your choice, and verify that it is properly stored Jordan Nash - Microprocessor Course

  32. Here is mine… When you build your board Think about Where inputs arrive Where the outputs go Where the memory buses will be Where the control bus will be What color wire you will use for what function Jordan Nash - Microprocessor Course

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