vcs used by the cp on port 7 n.
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VCs used by the CP (on Port 7). Port CP: 32  Switch control cells Port CP: 40+N  N/40 (IP Data from 0 to N) (FPX also may touch) Port CP: 61  */61 (DQ broadcast) (FPX also may touch) SPC0 has to have special treatment of VCI=61 so it can send a copy back to the CP for monitoring on VC = 60

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VCs used by the CP (on Port 7)


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    1. VCs used by the CP (on Port 7) • Port CP: 32  Switch control cells • Port CP: 40+N  N/40 (IP Data from 0 to N) (FPX also may touch) • Port CP: 61  */61 (DQ broadcast) (FPX also may touch) • SPC0 has to have special treatment of VCI=61 so it can send a copy back to the CP for monitoring on VC = 60 • Port CP: 68+N  N/0x321 (SPC CTRL cells) • Port CP: 76+N  N/34 (FPX NID CTRL) • Port CP: 84+N  N/62 (MSR Command Protocol) • Port CP: 92+N  N/63 (IP pkts from CP) • Port CP: 100+N  N/35 (FPX RAD CTRL) • Port CP: 108+N  N/36 (Second FPX NID) • Port CP: 116+N  N/37 (Second FPX RAD) • Port CP: 124+N  N/64 Debug Messages • Port CP: 132+N  N/65 (NMVC Probe SPC)? • Port CP: 150-199 Inclusive, used for signaling (UNI/PNNI) • Adding Port CP: 140 through 163 for control and downloading, see page 3 N = {0, 1, ..., 7} SPC/PE Control FPX Control IP Data flows

    2. VCs used by SPC ports: N = 0-7 • Port N: 33  CP/68+N (CTRL resp back to CP) • Port N: 34  CP/76+N (NID CTRL resp back to CP) • Port N: 35  CP/100+N (RAD CTRL resp back to CP) • Port N: 36  CP/108+N (Second NID CTRL resp back to CP) • Port N: 37  CP/116+N (Second RAD CTRL resp back to CP) • Port N: 40  0/40+N (IP Data to Port 0) (FPX also may touch) … • Port N: 47  7/40+N (IP Data to Port 7) (FPX also may touch) • Port N: 50  Previous/Next Hop (SPC or FPX) • Port N: 51  Previous/Next with FPX (FPX rx/send on 50) • Port N: 52-59 Reserved for data path • Port N: 61  */61 (DQ Broadcast) (FPX also may touch) • Port N: 62  CP/84+N (MSR Command Protocol) • Port N: 63  CP/92+N (IP to CP) • Port N: 64  CP/124+N, Debug Messages • Port N: 65  CP/132+N • Adding Port N: 66 control and downloading, see page 3

    3. Additions - Download Kernel • Port CP: 140 + (3 * N)  N/0x321 - SPC Control Cells • Port CP: 141 + (3 * N)  N/33 - SPC (control) Reply Cells • Port CP: 142 + (3 * N)  N/66 - SPC AAL5 data transfer VC • Port N: 33  CP/141 + (3 * N) • Port N: 66  CP/142 + (3 * N)

    4. 68 } Control Channels for SPCs 0-7 ... 75 } 60 DQ Monitoring Channel 84 } IP Table Management Channels for SPCs 0-7 ... 91 92 } IP Packet Channels between CP and SPCs 0-7 ... 99 76 } NID Control Channelsfor FPXs 0-7 ... 83 108 116 100 } } } NID Control Channels for Second FPX 0-7 RAD Control Channelsfor Second FPXs 0-7 RAD Control Channelsfor FPXs 0-7 ... ... ... 107 123 115 VCs used by CP (Connected to Port 0) CP NMVC VCs not shown

    5. SPC Data Connections (0, 40+n) 40 Next/ Previous Hop Router 50 SPCn IPPn Switch Fabric ... (7, 40+n) 47 to Output ports OPPn from Input ports 40 From port 0 50 ... From port 7 47

    6. Pacing Pacing DQ & SAR SPC/FPX Data Connections (Split IP and DQ Functions) (0, 40+n) 40 Next Router SPCn FPXn Switch Fabric ... Active (7, 40+n) 47 IP 51 (0, 140+n) 50 140 ... (7, 140+n) FIPL 147 IPPn OPPn 140 From port 0 ... From port 7 50 147 40 From port 0 ... From port 7 47

    7. 40 40 ... ... 47 47 Pacing DQ & SAR SPC/FPX Data Connections (FPX does all IP and DQ functions) Next Router SPCn FPXn IPPn Switch Fabric (port, VCI) 50 50 (0, 40+n) FIPL (7, 40+n) Active 51 51 51 OPPn 40 From port 0 50 ... From port 7 47

    8. 40 40 ... ... 47 47 Pacing DQ & SAR SPC/FPX Data Connections:FPX does all IP and DQ functions, Active Processing on Ingress SPC only. Next Router SPCn FPXn IPPn Switch Fabric (input=50, <nexthop>, A=0) (input=51, <nexthop>, A=*) (port, VCI) 50 50 APIC Cut-through (0, 40+n) FIPL (7, 40+n) 51 Active 51 (input=50, <nexthop>, A=1) 51 OPPn 40 From port 0 50 APIC Cut-through ... From port 7 47

    9. 40 ... SAR 47 SAR Pacing SAR SAR SPC/FPX Data Connections:FPX does all IP and DQ functions, Active Processing on Ingress SPC only. SPCn FPXn FIPL 50 50 APIC Cut-through <nexthop>, input=50|51, active=0|1 X (input=50, <nexthop>, A=1) 51 Active 51 (input=50, <nexthop>, A=0) (input=51, <nexthop>, A=*) 51 Shouldn’t A = 0?

    10. 40 40 ... ... 47 47 Pacing DQ & SAR SPC/FPX Data Connections (FPX does all IP and DQ functions) Why are these Output VCs going to both SPC and FPX? Next Router SPCn FPXn IPPn Switch Fabric (port, VCI) 50 50 (0, 40+n) FIPL (7, 40+n) Active 51 51 51 OPPn 1/40 From port 0 ... From port 7 1/47 0/40 From port 0 50 ... From port 7 0/47

    11. SPC DQ Connections IPP0 CP SPC0 61 OPP0 61 60 60 IPP1 SPC1 RC=7 0-7,61 61 OPP1 61 Range Copy Ports 0-7, VCI = 61 0,60 . . . 1,60 IPPn SPCn 61 RC=3 (2 copies) OPPn 61

    12. CP to SPCn and FPXn Control Connections 68+n 76+n CP 84+n 92+n 100+n IPP 0 108+n 116+n SPC0 FPX0 OPP 0 Left out NMVC VCs 124+n->64, 132+n->65 FPX1/2 SPCn IPP n 37 #2 RAD 36 #2 NID 35 #1 RAD OPP n 63 IP Local 62 IP Control 34 #1 NID SPC Control 0x321

    13. notes • MSR initialization • packets in/out • bytes in/out • drops • configuration params: link speed

    14. Replace Jammer: Initial VC config • ditch Jammer, use new GBNSC to initialize all connections • MSR configuration code does all of this. • jdd: discovery and download • jp: WUGS configuration, hardcode

    15. Sequence of Operations • Reset • Setup Connections • Discovery • Download Kernels • Init Kernels