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LO and Clock Generation and Distribution: LO Box and LO Splitter Box

LO and Clock Generation and Distribution: LO Box and LO Splitter Box. Pedro González Arash Kaftoosian. CDR of LLRF for Warm Linac January 15, 2019, ESS, Lund. www.essbilbao.org. Outline:. LO/CLK BOX PROTOTYPE AT ESS-BILBAO PROJECT DESCRIPTION Scope LO/CLK Distribution LO Box

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LO and Clock Generation and Distribution: LO Box and LO Splitter Box

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  1. LO and Clock Generation and Distribution:LO Box and LO Splitter Box Pedro González Arash Kaftoosian CDR of LLRF for Warm Linac January 15, 2019, ESS, Lund www.essbilbao.org

  2. Outline: • LO/CLK BOX PROTOTYPE AT ESS-BILBAO • PROJECT DESCRIPTION • Scope • LO/CLK Distribution • LO Box • LO Splitter Box • TECHNICAL SPECIFICATIONS • LO Box specifications • LO Splitter Box Specifications • Risk Management • CONCLUSION AND NEXT STEPS LLRF CDR, ESS, Lund, January 2019

  3. LO/CLK Box Prototype developed and tested at ESS-Bilbao LLRF CDR, ESS, Lund, January 2019

  4. LO/CLK Box Prototype • Two LO/CLK box prototypes were developed and tested at ESS-Bilbao: • One based on LMX2582 PLL RF synthesizer • And one based on divide-and-mix topology LLRF CDR, ESS, Lund, January 2019

  5. LO/CLK Box Prototype Reference signal used for the tests LLRF CDR, ESS, Lund, January 2019

  6. Test results: LO Amplitude stability LO Phase Noise LLRF CDR, ESS, Lund, January 2019

  7. Test results: LO Near carrier spurs Harmonics Close in carrier spurs Harmonics and Spurious for LO output LLRF CDR, ESS, Lund, January 2019

  8. Test results: Clock The 352.21 MHz reference is divided by 3 to generate the clock at 117.403 MHz using a low noise divider/prescaler and a low jitter LVPECL fanout buffer to provide 6 clock outputs. A low-pass filter is inserted after the divider, to reduce higher order harmonics and shape a proper square signal at 117 MHz for the LVPECL fanout buffer. Phase Noise of Clock Output 1 (LVPECL), 352 MHz reference divided by 3 Spectrum of Clock Output 1 (LVPECL) Long term Clock stability LLRF CDR, ESS, Lund, January 2019

  9. PROJECT DESCRIPTION LLRF CDR, ESS, Lund, January 2019

  10. Scope • The scope includes 10 LO/Clock generator boxes and one LO/Clock splitter box to feed the LLRF systems for the RFQ, MEBT buncher cavities, DTL tanks and spoke cavities. • Each RTM/AMC card in LLRF module needs one LO signal and one CLK for signal down-conversion and digitalization, as well as a reference signal at 352.21 MHz for up-conversion using a vector modulator LLRF CDR, ESS, Lund, January 2019

  11. Scope There will be 35 LLRF modules along the 352 MHz section with a total amount of 48 RTM/AMC cards, hence 48 LO signals and 48 CLK signals will be required. Each LO box has 4 LO outputs and 4 CLK outputs. To feed all 35 LLRFs (48 RTM/AMC cards), 10 LO boxes and one splitter box will be required. The same LO system can be used for beam instrumentation such as the BPMs for the 704 MHz section, which operates at 352 MHz LLRF CDR, ESS, Lund, January 2019

  12. LO/CLK Distribution Separate LO boxes are to be used for RFQ, MEBT bunchers and for each spoke section cryomodule (comprising 4 cavities). For DTL tanks, one LO box and one splitter will be used. LLRF CDR, ESS, Lund, January 2019

  13. LO Box • LO box will be developed based on a direct analog synthesizer or “Divide-and-Mix” topology. • Each LO box will provide 4 identical LO outputs and 4 CLK outputs and should be equipped with monitoring/control interfaces. • Although at the moment, interlock interfaces are not foreseen to be used, but two signals (enable/disable and ready/fault) will be considered for potential future needs. • A total amount of 10 LO boxes will be developed, according to this design, by using surface mount components, preferably all on one common PCB. Careful measures must be taken to avoid cross-talk and interference between components across the board. • Next slide shows block diagram of the LO box prototype based on divide-and-mix design. LLRF CDR, ESS, Lund, January 2019

  14. LO Box Block Diagram LLRF CDR, ESS, Lund, January 2019

  15. LO Splitter Box Block Diagram • One LO box will be used for DTL section which comprises 5 tanks. Each tank has one LLRF module with 3 RTMs/AMCs. Therefore, a total amount of 15 LOs/CLKs are needed for the DTL section. • That would require 4 LO boxes, but it has been decided to use one LO box for the DTL section, hence a splitter box to split 4 LOs and 4 CLKs (outputs of one LO box), to 15 LOs and 15 CLKs will be developed. • This splitter will be an active unit including amplifiers, filters, power dividers, fanout buffers, etc., using as much as possible the same components/design of the LO box. LLRF CDR, ESS, Lund, January 2019

  16. TECHNICAL SPECIFICATIONS LLRF CDR, ESS, Lund, January 2019

  17. LO Box Specs 6 dB ref input change Will vary 1.8 dB output LO 0.3 x 6 = 1.8 dB Square wave, or Sine wave, That is the question!! • LO output variations: • Due to ref input level (cable losses): constant • Due to ref input temp variations (±0.1dB)x0.3=0.06dB • Due to LO box temp variations: 0.05x4=0.2dB Total variations due to temp.: 0.26 dB LLRF CDR, ESS, Lund, January 2019

  18. LO Box Specs Front panel LEDs LO/CLK Frequency selection Monitoring In case Will be needed in future LLRF CDR, ESS, Lund, January 2019

  19. LO Splitter Box Specs One output Will be used for monitoring To be confirmed To compensate probable losses between Spliter box and diferente LLRFs LLRF CDR, ESS, Lund, January 2019

  20. LO Splitter Box Specs LLRF CDR, ESS, Lund, January 2019

  21. QA & Risk Management • To help manufacturer and avoid delays, ESS-Bilbao procures some components with long lead time such as ceramic filters • ESS-Bilbao will provide a bill of materials used in prototype as a guidance for the industry partner and will transfer relevant experiences • Compliance with CE marking will be required. This can be done by “Declaration of Conformity” • Getting offers from industry partners and contracting should be done soon. LLRF CDR, ESS, Lund, January 2019

  22. Next steps • After this CDR, final technical specifications will be sent to potential suppliers to get their offers and proceed with the tender process. • For the clock generation should be decided to use LVPECL square signals or sinewave signals. • After finishing the fabrication, tests will be done as follows: • FAT for all units in manufacturer premises • SAT1 for one LO box at ESS-Bilbao in our buncher cavity test stand along with one LLRF unit • SAT2 for all LO units and the splitter box at ESS. LLRF CDR, ESS, Lund, January 2019

  23. Thank you LLRF CDR, ESS, Lund, January 2019

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