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Introduction to Micro Controllers & Embedded System Design Instruction set

Introduction to Micro Controllers & Embedded System Design Instruction set. Department of Electrical & Computer Engineering Missouri University of Science & Technology hurson@mst.edu. Instruction set of 8051 can be partitioned into five groups: Arithmetic Logical Data Transfer

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Introduction to Micro Controllers & Embedded System Design Instruction set

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  1. Introduction to Micro Controllers&Embedded System DesignInstruction set Department of Electrical & Computer Engineering Missouri University of Science & Technology hurson@mst.edu A.R. Hurson

  2. Instruction set of 8051 can be partitioned into five groups: • Arithmetic • Logical • Data Transfer • Boolean variable, and • Program branching A.R. Hurson

  3. Arithmetic instructions are: A.R. Hurson

  4. Arithmetic instructions • Since 8051 supports different addressing modes ADD A, for example can be written in different ways: A.R. Hurson

  5. Arithmetic instructions: A.R. Hurson

  6. Arithmetic instructions: A.R. Hurson

  7. Arithmetic instructions: A.R. Hurson

  8. Arithmetic instructions Example: ADD A, #34H ; Add 34 to the accumulator MOV A, #25H MOV R2, #34H ADD A, R2 A.R. Hurson

  9. Example: Accumulator contains 63H, R3 contains 23H, and PSW contains 00H: • A) what is the hexadecimal content of accumulator and PSW after execution of the following instruction? ADD A, R3 • B) What is the content of accumulator in decimal • ACC = 86H and PSW = 05H • Decimal content of ACC = ? A.R. Hurson

  10. Note: Add instruction could change the AC, CY, or P bits of the flag register: Show the flag register contents after performing the following: MOV A, #0F5H ADD A, #0BH F5H 11110101 + 0BH+ 00001011 100H 1 00000000 CY =1 since there is a carry out P = 0 since result has even number of 1s AC = 1 since there is a carry from D3 to D4 A.R. Hurson

  11. Add the following 5 bytes of data, the sum is kept in R7 and Accumulator: Address Content 40 7D 41 EB 42 C5 43 5B 44 30 A.R. Hurson

  12. MOV R0, #40H ; indirect addressing MOV R2, #5 ; setting loop counter CLR A MOV R7, A AGAIN: ADD A, @R0 JNC NEXT INC R7 NEXT: INC R0 DJNZ R2, AGAIN 1s t iteration A = 7D, CY = 0  R7 = 0 2nd iteration A = 68, CY = 1  R7 = 1 3rd iteration A = 2D, CY = 1  R7 = 2 4th iteration A = 88, CY = 0  R7 = 2 5st iteration A = B8, CY = 0  R7 = 2 A.R. Hurson

  13. Analyze the following: Adding 2 16-bit numbers and saving the result in R6 (low byte of sum) and R7 (high byte of sum). CLR C MOV A, #0E7H ADD A, #8DH MOV R6, A MOV A, #36H ADDC A, #3BH MOV R7, A A.R. Hurson

  14. Example: Write a sequence of instructions to subtract content of R6 from R7 and leave the result in R7. MOV A, R7 CLR C SUBB A, R6 MOV R7, A A.R. Hurson

  15. The general format of subtract instruction is: SUBB A - source - CY • In 8051, subtraction is performed as 2’s complement addition: • Take 2’s complement of subtrahend • Add it to accumulator • Invert carry After the operation: if CY = 0 the result is positive, if CY = 1 the result is negative and destination has 2’s complement of the result. A.R. Hurson

  16. Analyze the following CLR C MOV A, #4CH SUBB A, #6EH JNC NEXT CPL A INC A NEXT: MOV R1, A A.R. Hurson

  17. Analyze the following CLR C MOV A, #62H SUBB A, #96H MOV R7, A MOV A, #27H SUBB A, #12H MOV R6, A A.R. Hurson

  18. Note: any location in local RAM can be incremented or decremented using direct addressing: INC 7FH A.R. Hurson

  19. Binary Coded Decimal • In an unpacked BCD, a byte is going to represent a decimal digit: high order half byte (a nible) is all zeros. i.e., 9 = 00001001 • In a packed BCD, a byte represents two decimal digits • In adding packed BCD numbers, we need to make sure to check that each nible of the sum is not greater than 9. If it is then we need to add 6 (0110) to correct the result. A.R. Hurson

  20. Binary Coded Decimal • DA A instruction is intended to resolve the aforementioned issue (it adds 0110 to the low and/or high nibles as needed). • Note: DA instruction must be used after addition of BCD operands. It will not work after any other arithmetic instruction such as INC. A.R. Hurson

  21. Assume the following 5 BCD data is stored in RAM. Analyze the Following code: Address Content 40 71 41 11 42 65 43 59 44 37 A.R. Hurson

  22. MOV R0, #40H ; indirect addressing MOV R2, #5 ; setting loop counter CLR A MOV R7, A AGAIN: ADD A, @R0 DA A JNC NEXT INC R7 NEXT: INC R0 DJNZ R2, AGAIN A.R. Hurson

  23. The general format of Multiplication operation is: MUL AB ; A * B, places the result in B and A MOV A, #25H MOV B, #65H MUL AB 25H * 65H = E99H B = 0EH A = 99H A.R. Hurson

  24. The general format of division operation is: DIV AB ; Divides A by B, places the quotient in ; A and the remainder in B MOV A, #95 MOV B, #10 DIV AB B = 05 A = 09 A.R. Hurson

  25. Logical instructions include: A.R. Hurson

  26. Logical instructions • As in case of arithmetic instructions, since 8051 supports different addressing modes each logical operation has different flavor, for example: A.R. Hurson

  27. Logical instructions • Rotating the bits of accumulator to right or left has the following general formats: RR A and RL A Rotate Right Rotate Left LSB LSB MSB MSB A.R. Hurson

  28. Logical instructions • Rotating the bits of accumulator to right or left through the carry has the following general formats: RRC A and RLC A C Y C Y LSB RLC A LSB RRC A MSB MSB A.R. Hurson

  29. Logical instructions • Note: Logical operations can be performed on any byte of the internal memory space XRL P1, #0FFH A.R. Hurson

  30. Logical instructions • SWAP A instruction exchanges the high and low nibbles within the accumulator. D7 – D4 D3 – D0 D3 – D0 D7 – D4 Before After A.R. Hurson

  31. Serializing a byte of data • This can be done by repeating the following sequence of instructions: RRC A ; Move a bit to CY MOV P1.3, C ; output a bit of data A.R. Hurson

  32. Logical instructions: A.R. Hurson

  33. Logical instructions: A.R. Hurson

  34. Logical instructions: A.R. Hurson

  35. Logical instructions: A.R. Hurson

  36. Write a program to transfer 41H serially via pin P2.1, puts two high at the beginning and end of the data: • MOV A, #41H • SETB P2.1 ; High • SETB P2.1 ; High • MOV R5, #8 ; Loop counter • HERE: RRC A • MOV P2.1, C • DJNZ R5, HERE • SETB P2.1 • SETB P2.1 A.R. Hurson

  37. Write a program to count number of 1s in a given byte: • MOV R1, #0 ; R1 is the counter • MOV R7, #8 ; Loop counter • MOV A, #97H ; Desired value • AGAIN: RLC A • JNC NEXT • INC R1 • NEXT: DJNZ R7, AGAIN A.R. Hurson

  38. Data Transfer instructions are: A.R. Hurson

  39. Data Transfer instructions: A.R. Hurson

  40. Data Transfer instructions: A.R. Hurson

  41. Data Transfer instructions: A.R. Hurson

  42. Data Transfer instructions: A.R. Hurson

  43. Data Transfer instructions • Internal RAM • Instructions that move data within the internal memory spaces execute in either one or two machine cycles. MOV Destination, Source allows data to be transferred directly between any two internal RAM and SFR locations. • Note: the upper 128 bytes of RAM are accessed only by indirect addressing and SFRs are accessed only by direct addressing. • Note: Stack resides in on-chip RAM and grows upward in memory. A.R. Hurson

  44. Data Transfer instructions Example: Note: Value (i.e., immediate addressing) can be moved directly to any A, B or R1-R7 registers. MOV R1, #12 ; Load 12 decimal (immediate addressing) ; to register R1 MOV R5, #0F9H ; Load F9 (hexadecimanl) to R5 ;0 is added to indicate F as a number not ; a letter A.R. Hurson

  45. Data Transfer instructions Example: MOV A, #5 ; 5 will be extended by zeros to the left ; and loaded into a register. ; This will result A = 0000101 MOV A, #256 ; Moving a value larger than 8 bits will ;cause an error MOV A, 17H ;17H is the address (direct addressing) ; of a location. Content of this location ; is moved to accumulator. A.R. Hurson

  46. Example MOV A, #55H ; Load value 55 in hexadecimal ; into accumulator MOV R0, A ; Copy content of accumulator ; to register R0 A.R. Hurson

  47. Data Transfer instructions • External RAM • The data transfer instructions that move data between internal memory and external memory use indirect addressing. • The indirect address is specified using a 1-byte address (@Ri, where Ri is either R0 or R1 of the active bank) or a 2-byte address (@DPTR). • All data transfer instructions that operate on external memory execute in two machine cycles and uses accumulator as either source or destination. A.R. Hurson

  48. Data Transfer instructions • Look up Tables • Two data transfer instructions are dedicated for reading look up tables in program memory: • MOVC (move constant) uses either the program counter or DPTR as the base register and the accumulator as the offset. MOVC A, @A + DPTR Accommodates a table of 256 entries (numbered 0 to 255). The number of desired entry is loaded into the accumulator and the data pointer is initialized to the beginning of the table. MOVC A, @A + PC works the same way, except PC is used as the base register. A.R. Hurson

  49. Data Transfer instructions • Look up Tables • The table is usually accessed through a subroutine: MOV A, #Entry CALL Look-up    LOOK-UP: INC A MOVC A, @A + PC RET TABLE: DB data, data, data, … A.R. Hurson

  50. Boolean instructions: • 8051 supports a complete bit-slice Boolean processing. The internal RAM contains 128 addressable bits and SFR space supports up to 128 other addressable bits. In addition, all port lines are bit addressable and each can be treated as a separate single-bit port. • Instructions that access these bit are: move, set, clear, complement, OR, and AND. A.R. Hurson

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