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Taylor Expansion Diagrams: A Compact Canonical Representation for Symbolic Verification

This paper introduces Taylor Expansion Diagrams (TED) as a new canonical representation for symbolic RTL verification, focusing on arithmetic and Boolean functions. TED offers compact and efficient handling of complex RTL designs, arithmetic operations, and Boolean logic, showcasing its applications, properties, and limitations. Through examples and construction details, TED demonstrates its effectiveness in symbolic representation and manipulation for verification tasks.

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Taylor Expansion Diagrams: A Compact Canonical Representation for Symbolic Verification

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  1. Taylor Expansion Diagrams:A Compact Canonical Representationfor Symbolic Verification M. Ciesielski, P. Kalla, Z. Zeng B. Rouzeyre Electrical & Computer Engineering LIRMM University of Massachusetts, Amherst, USA Montpellier, France ciesiel@ecs.umass.edu rouzeyre@lirmm.fr TED

  2. Outline • Motivation – RTL verification • Background • BDD (binary), BMD (word-level) • New canonical representation: TED • Construction and manipulation • Properties • Applications • Conclusions • Limitations, future work TED

  3. + + B 1 0 * * - - A F 0 1 B > A F ak s D <= bk ak s D bk Motivation – RTL Verification • Complex RTL designs • Data flow and control • Arithmetic and Boolean • Equivalence verification • Need representation that can handle arithmetic/Boolean • Efficient, compact • Canonical TED

  4. Common Representations • Boolean functions ( f : B  B ) • Truth table, Karnaugh map • SoP, PoS, ESoP, Reed-Muller, etc. • Binary Decision diagrams (BDD, ZDD, KFDD, …) • Arithmetic functions ( f : B  Int ) • Binary Moment Diagrams (*BMD, K*BMD, …) • Multi-terminal, Algebraic Decision Diagrams (ADD) • Need more abstract representation for arithmetic functions (f : Int  Int ) TED

  5. f x fx’ fx Binary Decision Diagrams (BDD) • Based on recursive Shannon expansion: f = x fx + x’ fx’ where:fx = f(x=1), fx’=f(x=0) • Compact data structure for Boolean logic • Canonical representation • reduced ordered BDDs (ROBDD) • Essential for verification • equivalence checking, satisfiability (SAT) TED

  6. a a b b c c 0 0 1 1 Application to Verification F = a’bc + abc +ab’c • Canonicity: equivalence checking of logic circuits G = (a+b)c  • Limitations • Require bit-level expansion of word-level variables • Size explosion for some functions (arithmetic) TED

  7. Binary Moment Diagrams (BMD) • Devised for word-level, arithmetic operations • Based on modified Shannon expansion (pos. Davio) f = x fx + x’ fx’ = x fx + (1-x) fx’ = fx’ + x (fx - fx’ ) = fx’ + x fx wherefx’ = fx=0is zero moment fx = (fx - fx’ )is first moment (derivative) TED

  8. BMD *BMD x2 x3 x1 x0 8 4 2 0 1 8 0 4 2 1 x1 x2 x0 x3 1 BMD – Example • Unsigned integer: X = 8x3 + 4x2 + 2x1 + x0 TED

  9. X Y 4 X + Y 2 4 1 2 1 4 4 0 0 1 1 x1 x0 x2 x2 x0 x1 y1 y0 y2 y1 y0 y2 2 2 1 1 *BMD • Efficiently models word-level operators • Limitation: requires bit-level representation of a word TED

  10. X + Y X Y 4 2 4 1 2 1 4 4 0 0 0 0 1 1 1 1 x0 x1 x0 x1 x2 x2 y2 y1 y0 y0 y2 y1 Y X Y X 2 2 1 1 Symbolic Symbolic Word level Word level Symbolic Representation • Why expand words into bits? Can we do better? • Abstract words into symbolic variables TED

  11. F(x) x … F1(x) F0(x) F2(x) Taylor Expansion Diagram (TED) • F = arithmetic function (F : Int  Int ) • Treat F as a continuous function • Taylor Expansion (around x=0): F(x) = F(0) + x F’(0) + ½ x2 F’’(0) + … • Notation • F0(x) = F(x=0) 0-child - - - - - - • F1(x) = F’(x=0) 1-child---------- • F2(x) = ½ F’’(x=0) 2-child====== • etc. • F(x) = F0(x)+ x F1(x) + x2 F2(x) + … TED

  12. F0(A) =F|A=0 = 2C + 3 F1(A) =F’|A=0 = 2AB|A=0 = 0 C B A C A B F2(A) =½ F’’|A=0 = B B B0 = B(0) = 0 B1=B’= 1 0 1 2 3 G0(C) = (2C+3)|C=0 = 3 G1(C) = (2C+3)’= 2 Construction - Your First TED F = A2B + 2C + 3 G= 2C + 3 (without normalization) TED

  13. (A+B)(A+2C) (A+B)C +1 X2 = (8x3 + 4x2 + 2x1 + x0)2 64 A B B A 16 16 B 8 4 4 1 2 C C 4 0 0 1 1 1 1 0 1 1 1 1 x1 x1 x0 x0 x2 x3 x2 2 1 1 1 TED – a few Examples TED

  14. 2. Merge isomorphic subgraphs Eliminate redundant nodes: Nodes with all edges  0 Nodes with only constant term f A a A 1 1 6 6 5 g 5 B B B B b C C C C g 1 1 0 1 0 0 1 0 b TED - Reduction Rules • f = 0 a2 + 0 a + g(b) = g(b) (A2 + 5A + 6)(B + C) TED

  15. A B A B 2 6 1 2 2 A 1 2 1 3 2 B 3 1 0 1 TED Normalization • TED can be normalized • weights of edges of a given node must be relativelyprime (to allow sharing isomorphic graphs) 2A + 2B + 6 2(A + B + 3) TED

  16. h = f OP g z OP OP= (+, - , •) f g u x y q v TED: Composition • Recursive composition of nodes, starting at the top • Operation depends on relative order of variables x, y • if x = y, then z = x, and h(x) = f(x) OP g(x) = f0(x) OP g0(y) + x [f1(x) OP g1(y)] + x2[f2(x) OP g2], … • if x > y, then z = x, and h(x) = f0(x) OP g(y) + x [f1(x) OP g(y)] + x2[f2(x) OP g], … • else …. = TED

  17. x x x u v u + v = + u0+v0 u1+v1 u0 u1 v0 v1 x y x u u + v v = + u0+ v u0 u1 v0 v1 u1 COMPOSE Operator – ADD/SUB • Nodes indexed by same variable • Nodes indexed by different variable (x > y) TED

  18. x x x u • v u v u1•v1 u0•v0 u0 u1 v0 v1 u0•v1+u1•v0 x y u x u • v v u0 u1 v0 v1 u0 • v u1 • v COMPOSE Operator – MULT • Nodes indexed by same variable = • • Nodes indexed by different variable (x > y) = • TED

  19. A+B A+2C A A A B B C 4 6 C 1•5 1•5 0+7 4•6 3•5 3•1 0•5 3 8 7 5 A 1 1 1 2 2 1 0 0 0 2 0 0 0•2 1•2 1•2 1•1 0•1 0•0 1•0 1•1 1•0 1 B B B B C C 8+7 C 2 0+2 0+0 COMPOSE Operation - Example B = + * C (A+B)(A+2C) + = TED

  20. Canonical Compact Linear for polynomials of arbitrary degree TED for Xk, k = const, with n bits, hask(n-1)+1 nodes. Can contain symbolic, word-level, and Boolean variables It is not a Decision Diagram X2=(8x3+4x2+2x1+x0)2 64 16 16 8 4 4 4 1 1 1 1 0 1 x1 x0 x1 x0 x3 x2 x2 2 1 1 1 Properties of TED n = 4, k = 2 TED

  21. x x x x x y = x y x y = (x + y – x y) x y = (x + y – 2 x y) x’ = (1-x) 1 -1 y y y y y 0 0 0 0 1 1 1 1 -1 -2 1 1 NOT XOR AND OR TED for Boolean logic • Needed to model arithmetic-Boolean interface TED

  22. B + A F1 Ahi Alo 1 0 * - Ahi ak s1 D > bk 2(k+1) ak 2k Alo s1 = ak (1-bk) 1 0 TED for Arithmetic Circuits • Arithmetic circuits contain related word-level (A, B) and Boolean (ak, bk) variables A = [ an-1, …, ak , …,a0 ] = 2(k+1)Ahi + 2k ak + Alo TED

  23. B A + * F2 A F1 - 1 0 * 0 1 B - * D s2 ak s1 ak D > bk bk Applications to RTL Verification • Equivalence checking with TEDs • interacting word-level and Boolean variables F2 = (1-s2) (A2-B2) + s2 D s2 = ak’ bk = 1 - ak + ak bk F1 = s1(A+B)(A-B) + (1-s1)D s1 = (ak > bk) = ak (1-bk) A = [Ahi,ak,Alo], B = [Bhi,bk,Blo] TED

  24. F1 = F2 -1 -1 22k+2 2k+2 Blo Alo Ahi Alo ak ak bk bk 1 1 1 0 2k 1 D -22k+2 -2k+2 Bhi 2k+1 2k RTL Verification – Result • Related word-level and Boolean variables F1 = s1(A+B)(A-B) + (1-s1)D s1 = (ak > bk) = ak (1-bk) F1 = (ak-akbk){ (2k+1Ahi + 2kak +Alo)2 - (2k+1Bhi + 2k bk + Blo)2 } + (1–ak + akbk) D TED

  25. Conclusions • TED representation, features • Canonical • Compact (linear for polynomials) • Represents arithmetic (word-level) operators + Boolean logic • Applications • Equivalence checking, symbolic simulation • Limitations • TED still needs to be implemented: efficiency, robustness? • How to represent relations (X < Y) without bit expansion? • Normalization: more complicated than in *BMD • Infinite series for some functions (ax) • Open problems • Application to satisfiability (SAT), functional test generation TED

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