1 / 21

NetBench: A Benchmarking Suite for Network Processors

NetBench: A Benchmarking Suite for Network Processors. Wendong Hu Gokhan Memik Department of Electrical Engineering University of California, Los Angeles. Overview. What is inside a router? A buyer wants the best Designer would like to build the best But what is the best? Benchmarks

duy
Download Presentation

NetBench: A Benchmarking Suite for Network Processors

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. NetBench: A Benchmarking Suite for Network Processors Wendong Hu Gokhan Memik Department of Electrical Engineering University of California, Los Angeles

  2. Overview • What is inside a router? • A buyer wants the best • Designer would like to build the best • But what is the best? • Benchmarks • SPEC, TPC, SPLASH, …

  3. Outline • Introduction • Network Processor Survey • Programs • Results • Conclusion

  4. flexibility G-CPU ASIC performance Introduction • What is a Network Processor? • Programmable ICs based on system-on-a-chip technology that perform communications-specific functions more efficiently than general-purpose processors NP

  5. Introduction (cont.) • Why Network Processor(NP) • 1 Gbps is limit for off-the shelf processors • Emerging technologies and applications • What did we do • Survey NP • Decide on a set of applications • Who and why are people going to use NP’s • Gather statistics and compare

  6. Companies • Acorn Networks (genFlow); Alchemy (Au1000); AMCC/MMC (nP); Bay Micro; BOPS (Manta); Broadcom/SiByte (SB-1 core; SB-1250); Chameleon (CS2112); Chrysalis-ITS; Cisco (Toaster 2); Cognigine; Conexant/Maker (CX27510, MXT4400); empowerTel (MxP); Extreme Packet Devices; EZChip; Fast-Chip; Hi/fn; Hyperchip; IBM (PowerNP); IDT; Improv (Jazz); Infineon; Intel/Level One (IXP1200); Internet Machines; Lexra (NetVortex IP core); Lucent/Agere (Payload Plus); MIPS; Motorola/C-Port (C-5); Philips; PixelFusion; Pluris; PMC-Sierra/QED; Redback Networks/Siara; Silicon Access Networks (iFlow); Solidum; Stargate; StarGen; TranSwitch; T.sqware; Vertex Networks (XpressFlow); Vitesse/Sitera (Prism IQ2000); Vitesse/XaQti (Active-Flow Processor); XStream; ZettaCom (ZEN).

  7. Example Design

  8. Example Design

  9. Applications • Web applications • Load-balancing, URL-based switching, web caching • Security • firewall, VPN, access control, encryption • Routing and Switching • VoIP gateways, IP routing, Smart routing mechanisms (DRR?) • QoS issues • MPLS, QoS scheduling and/or classification

  10. Programs in NetBench • Programs from 3 different levels: • Micro-codes • Low-level tasks (CRC, memcopy, …) • IP level programs • Routing and related applications • High level programs • Encryption-decryption, load balancing, Level 7 switching

  11. Complete list • High-level: • UBS (URL-based switching) • RTS (Real-Teal Streaming) • TCS4 (load balancing) • DF (Diffie-Hellman) • MD5 (Message Digest) • Micro-level • CRC-32 • Table-lookup

  12. Complete list (cont.) • IP level • MCAST (multicasting) • DRR (Deficit Round Robin) • CEDF (Coordinated earliest deadline first) • NAT (Network address translation) • IPv6TB (IP version 6 tunneling) • IPCHAINS (firewall) • IPATM (IP over ATM support) • Route (IPv4 routing)

  13. Methodology • Implementations • Use the available software • Not too optimized for a specific architecture • Some applications from FreeBSD • SimpleScalar Simulator • Most popular simulator in Architecture community (cycle-based) • Extensive information about program execution • Intel IXP1200 Simulator • Micro-code assembler and debugger • Accurate, detailed cycle-based simulator

  14. Input Trace • From Columbia University

  15. Applications in SimpleScalar • MD5 • DRR • NAT • Route • Table Lookup • CRC_32

  16. Execution Times

  17. Cache behaviour • Miss rates are small compared to SPEC

  18. Parallelism • IPC: Instruction executed per cycle

  19. Routing Table Size

  20. Intel IXP1200

  21. Conclusion and Future Work • Need innovative architectures for fast link and emerging applications • Network processors deliver the necessary flexibility and processing power • Need a framework to compare the performances => NetBench • Some applications are not as tough as predicted • Continue porting applications and running simulations

More Related