Vincent H. Berk October 18, 2008 Reading for today: 2.1 – 2.5 Reading for Monday: 2.6 – 2.11. Dynamic Branch Prediction. Dynamic Branch Prediction. Control dependences limit ILP Performance = (accuracy, cost of misprediction )
Lower bits of PC
2-bits per branch predictor
2-bit global branch history
4096 Entries 2-bit BHT
Unlimited Entries 2-bit BHT
1024 Entries (2,2) BHT
Frequency of Mispredictions
4,096 entries: 2-bits per entry
Unlimited entries: 2-bits/entry
1,024 entries (2,2)
Branch target calculation is costly and stalls the instruction fetch.
BTB stores PCs the same way as caches
The PC of a branch is sent to the BTB
When a match is found the corresponding Predicted PC is returned
If the branch was predicted taken, instruction fetch continues at the returned predicted PCBranch Target Buffers
Enter branch instruction PC and next PC into branch target bufferFigure 3.20 The steps involved in handling an instruction with a branch-target buffer
Send PC to memory and branch-target buffer
Entry found in branch-target buffer?
Send out predicted PC
Is instruction ataken branch?
Normal instruction execution
Mispredicted branch, kill fetched instruction; restart fetch at other target; delete entry from target buffer
Branch correctly predicted; continue execution with no stalls