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HCC Test Data Outputs. High Priority Register. Normally sent out (Register Read packet) whenever its value changes. Auto Output. To facilitate testing of the HCC, on power up, the HCC will output a repeating 8x64bit data block at 40 MHz:
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High Priority Register Normally sent out (Register Read packet) whenever its value changes. HCC Test Data Outputs
Auto Output To facilitate testing of the HCC, on power up, the HCC will output a repeating 8x64bit data block at 40 MHz: 1x64-bit block: HCC low priority read packet with the contents of the high priority register 7x64-bit blocks: unique sequence of fixed bit patterns that is balanced AND’ed with output of data concentrator HCC Test Data Outputs
Auto Output (2) Makes it possible to determine where you are in the sequence for both scope and FPGA decoding Works for both DC and AC coupling HCC Test Data Outputs
Periodic High Priority Output High Priority Register read packet will be generated whenever HP register value changes A mode can be set that will generate an HP read packet at a programmable interval through the data concentrator Enables easy sync to output, without requiring ABC May be useful for various debugging tasks HCC Test Data Outputs