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Trends of Programmable Logic Industry and Its Growth in Asia-Pacific PROFIT Dec 22, 2009

Trends of Programmable Logic Industry and Its Growth in Asia-Pacific PROFIT Dec 22, 2009. Fai Yeung VP APAC Sales & Marketing. Common Challenges. “Fickle Market Demands. Spiraling Complexity. Shorter Life Cycle. Capped Engineering Budgets. Programmable Imperative!.

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Trends of Programmable Logic Industry and Its Growth in Asia-Pacific PROFIT Dec 22, 2009

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  1. Trends of Programmable Logic Industry and Its Growth in Asia-Pacific PROFITDec 22, 2009 Fai Yeung VP APAC Sales & Marketing

  2. Common Challenges “Fickle Market Demands Spiraling Complexity Shorter Life Cycle Capped EngineeringBudgets Programmable Imperative! “Differentiate or Die” Accelerated Time to Market Lowest TCO Green

  3. The Time for Programmables is Now! MarketForces Programmable Imperative! FinancialConstraints TechnologyInnovation

  4. Key Market Trends Rapid consumer-driven change Hyper-connectivity Fickle, fragmented markets Time-to-market and flexibility: Key attributes for success

  5. Continued Rise of ASIC/ASSP Development Costs Rising costs at advanced process nodes ($M) IC Cost by Process Node $100M $61M $34M $24M $16.1M $10.1M Process Nodes (nm) Source: Chartered and Synopsys

  6. WW ASIC Design Starts22% Decline in 2009 "More likely, we will see a large percentage of these questionable designs not hit any production and die a slow death by indefinite push-outs” Bryan Lewis, Gartner Analyst

  7. Tier 1 Semiconductor Company Challenges Manufacturing transition: Fabbed  Fablite  Fabless 300mm Fab Costs: • 45nm = $3B • 32nm - $10B Target market rationalization and consolidation Pursuing ultra high volume applications Source: GSA

  8. Tier 2 ASSP Vendor Challenges Narrow Focus to high volume applications IC Cost by Process Node ($M) $100M $500 $400 $61M $300 Minimum Market Size ($M) $200 $34M $24M $16.1M $100 $10.1M Process Nodes (nm) Profitability and business model under severe pressure 29 /115 companies followed by GSA, have market cap < cash 10 Source: Chartered and Synopsys

  9. Tier 3 Startup Challenges: Funding has Vanished Round-A funding (dollar amount) declined 82% from 2000 and 2007 *Through Q308, only 2 chip companies received Round-A funding, totaling $12M Source: GSA

  10. What FPGA Means to Systems Customers Do more with less Improve engineering productivity Reduce risk profile Avoid big bets on ASIC design starts Focus on core competencies Differentiate or die

  11. FPGA Technology Innovation MarketForces Programmable Imperative! Cost Power Bandwidth Application-ready FinancialConstraints TechnologyInnovation

  12. Introducing Virtex-6 and Spartan-6 FPGA Families Deliver up to 60% lower system cost Cut power consumption by 65% Reduce development time by 50% Achieve over 1Tbps IO bandwidth Delivering customer breakthrough performance, power and cost benefitsto push programmability beyond the tipping point 40nm/45nm in production CY10 Next gen technology coming

  13. The Growing ASIC/ASSP Application Gap Market Size ASIC / ASSP Class Applications UnderservedApplications Traditional FPGA Class Applications Application Market Segments + 100s More

  14. Xilinx Growth Opportunity Ahead NewGrowth ASIC ASSP Source: iSuppli, March 2008

  15. APAC Growth Trend 3G/LTE Wired Industrial/Scientific Medical Consumer Green IT Surveillance Intelligent Video Video Analytics Cloud Computing Security Infrastructure

  16. The future of FPGA has never been brighter • Technology causes ASSP development costs continue to rise as it lowers the power and cost of FPGA – Advantage FPGA • No Differentiation with ASSP – Advantage FPGA • Multi- Core is non-deterministic and very difficult to program, FPGA tools are getting faster and easier ( C to Gates) – Advantage FPGA • Multi-Core may drive more FPGA deployment (acceleration and load leveling) - Advantage FPGA • DSP’s need accelerators and lag the market need – Advantage FPGA

  17. The Time for Programmables is Now! MarketForces Programmable Imperative! FinancialConstraints TechnologyInnovation Important Possible Urgent

  18. Thank You

  19. Semiconductors Power the Information Revolution IntegratedCircuitby Jack Kilby Moore’s Law by Gordon Moore FPGA by Ross Freeman FPGA inventor Xilinx Co-Founder 2009 National Inventors Hall of Fame

  20. Xilinx Historic Revenue

  21. Xilinx Revenue BreakdownQ3 Calendar Year 2009 Revenue by Geography Revenue by End Market Consumer & Auto Data Processing Asia Pacific Japan Industrial & Other Europe North America Communications Source: Xilinx, Inc.

  22. 25 Years of XilinxGreat assets: foundation for a bright future Great key customer relationships Communications Data processing Consumer and Automotive Industrial and Other 50%MarketShare FinancialStability Operating Cash Flow: $581M Cash &Investments$2B Cisco Huawei Sony Harman Becker Diversified customers and markets Excellent financial scorecard

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