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University of Palestine Faculty of Engineering and Urban planning Software Engineering Department. Digital Logic Design ESGD2201. Lecture 11. Function of Combinational Logic. Eng. Mohammed Timraz Electronics & Communication Engineer. Wednesday, 29 th October 2008. Agenda.

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slide1

University of Palestine

Faculty of Engineering and Urban planning

Software Engineering Department

Digital Logic Design ESGD2201

Lecture 11

Function of Combinational Logic.

Eng. Mohammed Timraz

Electronics & Communication Engineer

Wednesday, 29th October 2008

slide2

Agenda

Function of Combinational Logic.

1. Basic Adders.

2. Parallel Binary Adders.

3. Comparators.

4. Decoders.

5. Encoders.

6. Code Converters.

7. Multiplexers.

8. Demultiplexers.

slide3

Function of Combinational Logic.

  • Basic Adders:
  • Adders are important not only in computers, but in many types of digital systems in which numerical data are processed.
  • An understanding of the basic adder operation is fundamental to the study of digital systems.
slide4

Function of Combinational Logic.

1. The Half Adder:

Recall the basic rules for binary addition.

These operations are performed by a logic circuit called a half-adder.

slide5

Function of Combinational Logic.

1. The Half Adder:

Half Adder Logic Symbol:

The half-adder accepts two binary digits on its inputs and produces two binary digits on its outputs, a sum bit and a carry bit.

Logic symbol for a half-adder.

slide6

Function of Combinational Logic.

1. The Half Adder:

The Half Adder Truth Table:

∑ =sum

Cout = output carry

A and B = input variables (operands)

slide7

Function of Combinational Logic.

1. The Half Adder:

From the logical operation of the half-adder as stated in the truth Table, expressions can be derived for the sum and the output carry as functions of the inputs.

Notice that the output carry (Cout) is a 1, only when both A and B are 1s; therefore, (Cout)can be expressed as the AND of the input variables.

1

Now observe that the sum output (∑) is a 1 only if the input variables, A and B, are not equal. The sum can therefore be expressed as the exclusive-OR of the input variables.

2

slide8

Function of Combinational Logic.

1. The Half Adder:

The Half Adder Logic Diagram

From Equations (1) and (2), the logic implementation required for the half- adder function can be developed.

The output carry is produced with an AND gate with A and B on the inputs, and the sum output is generated with an exclusive-OR gate, as shown in the following Figure.

The Half Adder Logic Diagram

slide9

Function of Combinational Logic.

2. The Full Adder:

The second basic category of adder is the Full-adder.

The basic difference between a full-adder and a half-adder is that:

1- The full-adder accepts an input carry.

2- A logic symbol for a full-adder as shown in the following Figure.

3- The truth table in the following Table shows the operation of a full-adder.

slide10

Function of Combinational Logic.

The Full Adder:

Half Adder Logic Symbol

The full-adder accepts three inputs including an input carry and generates a sum output and an output carry.

Logic symbol for a Full-adder.

slide11

Function of Combinational Logic.

The Full Adder:

The Full Adder Truth Table

Cin = input carry, sometimes designated as CI

Cout = output carry, sometimes designated as CO

∑ =sum

A and B = input variables (operands)

slide12

Function of Combinational Logic.

The Full Adder:

  • The full-adder must add the two input bits and the input carry.
  • From the half-adder we know that the sum of the input bits A and B is the exclusive-OR of those two variables, .
  • For the input carry (C) to be added to the input bits, it must be exclusive-ORed with , yielding the equation for the sum output of the full-adder.
slide13

Function of Combinational Logic.

The Full Adder:

The Full Adder Logic Diagram

  • This means that to implement the full-adder sum function:
    • Two exclusive-OR gates can be used.
    • The first must generate the term ,
    • The second has as its inputs the output of the first XOR gate and the
    • input carry, as illustrated in the following Figure.

(a) Logic required to form the sum of three bits

slide14

Function of Combinational Logic.

The Full Adder:

The Full Adder Logic Diagram

(b) Complete logic circuit for a full-adder (each half-adder is enclosed by a shaded area)

slide15

Function of Combinational Logic.

The Full Adder:

The Full Adder Logic:

  • The output carry is a 1 when both inputs to the first XOR gate are 1s or when both inputs to the second XOR gate are 1s.
  • The output carry of the full-adder is therefore produced by the inputs A ANDed with B and ANDed with Cin .
  • These two terms are ORed, as expressed in the following Equation.
  • This function is implemented and combined with the sum logic to form a complete full-adder circuit, as shown in the Figure (b).
slide16

Function of Combinational Logic.

The Full Adder:

The Full Adder Logic Diagram

(b) Complete logic circuit for a full-adder (each half-adder is enclosed by a shaded area)

slide17

Function of Combinational Logic.

The Full Adder:

The Full Adder Implementated with half adder Logic:

Notice in Figure (b) there are two half-adders, connected as shown in the block diagram of the following Figure (a), with their output carries ORed.

(a) Arrangement of two half-adders to form a full-adder

slide18

Function of Combinational Logic.

The Full Adder:

The Full Adder Logic Symbol:

The logic symbol shown in the following Figure (b) will normally be used to represent the full-adder.

(b) Full-adder logic symbol

slide19

Function of Combinational Logic.

Example 1:

Determine an alternative method for implementing the full-adder.

Solution:

Referring to the truth Table of full adder, you can write sum-of-products expressions for both ∑ and Cout by observing the input conditions that make them 1s. The expressions are as follows:

slide20

Function of Combinational Logic.

Example 1:

Mapping these two expressions on the Karnaugh maps in the following Figure, you find that the sum (∑) expression can’t be simplified. The output carry expression (Cout) is reduced as indicated.

slide21

Function of Combinational Logic.

Example 1:

These two expressions are implemented with AND-OR logic as shown in the following Figure to form a complete full-adder.